Hoyoung Yoo

Publication Activity (10 Years)

Years Active: 2011-2024
Publications (10 Years): 21

Top Topics

Floating Point Unit

Top Venues

IEEE Trans. Circuits Syst. II Express Briefs

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Jiho Park, Hee-Hun Yang, Donghun Lee, Hoyoung Yoo
Physical Unclonable Function Using Programmable Delay Lines. ICEIC (2024)
Yongtaek Hwang, Jiwoo Hwang, Yuseok Lee, Hoyoung Yoo
Efficient CRC-BCH Unified Encoder for Global Positioning System. ICEIC (2024)
Muhammad Junaid, Hayotjon Aliev, Sangbo Park, HyungWon Kim, Hoyoung Yoo, Sanghoon Sim
Hybrid Precision Floating-Point (HPFP) Selection to Optimize Hardware-Constrained Accelerator for CNN Training. Sensors 24 (7) (2024)
Eunchae Lee, Soyeon Choi, Jiho Park, Sungkyun Shin, Hoyoung Yoo
Practical Analysis of Xilinx FPGAs' Bitstream Encryption. ICEIC (2023)
Sangwon Lee, Jiho Park, Jeongho Kim, Yongtaek Hwang, Soyeon Choi, Hoyoung Yoo
Quantitative Analysis of Various 2D CNN Structures based on Dataflow. ICEIC (2023)
Byeong Yong Kong, Hoyoung Yoo, Youngjoo Lee
An Automated Synthesis Framework for Fast Evaluation of Maximum Operating Frequency. ICEIC (2023)
Nari Im, Soyeon Choi, Hoyoung Yoo
S-Box Attack Using FPGA Reverse Engineering for Lightweight Cryptography. IEEE Internet Things J. 9 (24) (2022)
Sungkyun Shin, Soyeon Choi, Eunchae Lee, Songyeon Lee, Hoyoung Yoo
Implementation of Aurora Interface using SFP+ Transceiver. ISOCC (2022)
Soyeon Choi, Yerin Shin, Hoyoung Yoo
Analysis of Ring-Oscillator-based True Random Number Generator on FPGAs. ICEIC (2021)
Sungryoung Lee, Hoyoung Yoo
Configurable Digital Pulse Generator for Neuromorphic Devices. ICEIC (2021)
Jiwoon Park, Gwang Hee Jo, Jinseok Kim, Hoyoung Yoo
Area-Efficient On-the-Fly Code Generator for BDS B1C Receivers. ICEIC (2021)
Dongyun Kam, Hoyoung Yoo, Youngjoo Lee
Ultralow-Latency Successive Cancellation Polar Decoding Architecture Using Tree-Level Parallelism. IEEE Trans. Very Large Scale Integr. Syst. 29 (6) (2021)
Soyeon Choi, Nari Im, Hoyoung Yoo
FPGA Design Duplication based on the Bitstream Extraction. ISOCC (2021)
Soyeon Choi, Jieun Yeo, Hoyoung Yoo
Extraction of ROM Data from Bitstream in Xilinx FPGA. ISOCC (2020)
Hyeonkyu Kim, Soyeon Choi, Hoyoung Yoo
On-demand Syndrome Calculation for BCH decoding. ICEIC (2019)
Eunmi Chu, Hoyoung Yoo, Bang Chul Jung
Resource usage of LTE networks for machine-to-Machine group communications: Modeling and analysis. Comput. Electr. Eng. 71 (2018)
Soyeon Choi, Hoyoung Yoo
Hybrid Decoding for Polar Codes. ISOCC (2018)
Hoyoung Yoo, In-Cheol Park
Efficient Pruning for Successive-Cancellation Decoding of Polar Codes. IEEE Commun. Lett. 20 (12) (2016)
Byeong Yong Kong, Hoyoung Yoo, In-Cheol Park
Efficient Sorting Architecture for Successive-Cancellation-List Decoding of Polar Codes. IEEE Trans. Circuits Syst. II Express Briefs (7) (2016)
Hoyoung Yoo, Youngjoo Lee, In-Cheol Park
Low-Power Parallel Chien Search Architecture Using a Two-Step Approach. IEEE Trans. Circuits Syst. II Express Briefs (3) (2016)
Jihyuck Jo, Hoyoung Yoo, In-Cheol Park
Energy-Efficient Floating-Point MFCC Extraction Architecture for Speech Recognition Systems. IEEE Trans. Very Large Scale Integr. Syst. 24 (2) (2016)
Jaehwan Jung, Hoyoung Yoo, Youngjoo Lee, In-Cheol Park
Efficient Parallel Architecture for Linear Feedback Shift Registers. IEEE Trans. Circuits Syst. II Express Briefs (11) (2015)
Hoyoung Yoo, In-Cheol Park
Partially Parallel Encoder Architecture for Long Polar Codes. IEEE Trans. Circuits Syst. II Express Briefs (3) (2015)
Youngjoo Lee, Hoyoung Yoo, Injae Yoo, In-Cheol Park
High-Throughput and Low-Complexity BCH Decoding Architecture for Solid-State Drives. IEEE Trans. Very Large Scale Integr. Syst. 22 (5) (2014)
Hoyoung Yoo, Youngjoo Lee, In-Cheol Park
7.3 Gb/s universal BCH encoder and decoder for SSD controllers. ASP-DAC (2014)
Youngjoo Lee, Hoyoung Yoo, Jaehwan Jung, Jihyuck Jo, In-Cheol Park
A 2.74-pJ/bit, 17.7-Gb/s Iterative Concatenated-BCH Decoder in 65-nm CMOS for NAND Flash Memory. IEEE J. Solid State Circuits 48 (10) (2013)
Hoyoung Yoo, Jaehwan Jung, Jihyuck Jo, In-Cheol Park
Area-Efficient Multimode Encoding Architecture for Long BCH Codes. IEEE Trans. Circuits Syst. II Express Briefs (12) (2013)
Youngjoo Lee, Hoyoung Yoo, In-Cheol Park
100b error-correcting BCH decoder in 0.13µm CMOS process. ASP-DAC (2013)
Youngjoo Lee, Hoyoung Yoo, In-Cheol Park
Small-area parallel syndrome calculation for strong BCH decoding. ICASSP (2012)
Hoyoung Yoo, Youngjoo Lee, In-Cheol Park
Low-latency area-efficient decoding architecture for shortened reed-solomon codes. ISOCC (2012)
Youngjoo Lee, Hoyoung Yoo, Injae Yoo, In-Cheol Park
6.4Gb/s multi-threaded BCH encoder and decoder for multi-channel SSD controllers. ISSCC (2012)
Youngjoo Lee, Hoyoung Yoo, In-Cheol Park
Low-Complexity Parallel Chien Search Structure Using Two-Dimensional Optimization. IEEE Trans. Circuits Syst. II Express Briefs (8) (2011)