Low-Power Parallel Chien Search Architecture Using a Two-Step Approach.
Hoyoung YooYoungjoo LeeIn-Cheol ParkPublished in: IEEE Trans. Circuits Syst. II Express Briefs (2016)
Keyphrases
- low power
- vlsi architecture
- power consumption
- low cost
- high speed
- real time
- single chip
- high power
- cmos technology
- mixed signal
- nm technology
- logic circuits
- wireless transmission
- design methodology
- delay insensitive
- vlsi circuits
- vlsi implementation
- design considerations
- power reduction
- shared memory
- parallel processing
- power saving
- low power consumption