Hiroyuki Igura

Publication Activity (10 Years)

Years Active: 1994-2012
Publications (10 Years): 0

Top Venues

Publications

Toshiki Takeuchi, Hiroyuki Igura, Masao Ikekawa
Stream-access-oriented baseband signal processors for SDR. ISCAS (2012)
Toshiki Takeuchi, Hiroyuki Igura, Takeshi Hashimoto, Soichi Tsumura, Naoki Nishi
Scalable bus interface for HSDPA co-processor extension. CICC (2005)
Hiroyuki Igura, Masaru Hirata, Junya Yamada, Masakazu Yamashina, Shigeru Ono
A low-power W-CDMA demodulator using specially-designed micro-DSPs. CICC (2002)
Hiroyuki Igura, Yukihiro Naito, Kenya Kazama, Ichiro Kuroda, Masato Motomura, Masakazu Yamashina
An 800-MOPS, 110-mW, 1.5-V, parallel DSP for mobile multimedia processing. IEEE J. Solid State Circuits 33 (11) (1998)
Masanori Izumikawa, Hiroyuki Igura, Hitoshi Wakabayashi, Ken Nakajima, Tohru Mogami, Tadahiko Horiuchi, Masakazu Yamashina
A 0.25-μm CMOS 0.9-V 100-MHz DSP core. IEEE J. Solid State Circuits 32 (1) (1997)
Masayuki Mizuno, Masakazu Yamashina, Koichiro Furuta, Hiroyuki Igura, Hitoshi Abiko, Kazuhiro Okabe, Atsuki Ono, Hachiro Yamada
A GHz MOS adaptive pipeline technique using MOS current-mode logic. IEEE J. Solid State Circuits 31 (6) (1996)
Kazumasa Suzuki, Masakazu Yamashina, Takashi Nakayama, Masanori Izumikawa, Masahiro Nomura, Hiroyuki Igura, Hideki Heiuchi, Junichi Goto, Toshiaki Inoue, Youichi Koseki, Hitoshi Abiko, Kazuhiro Okabe, Atsuki Ono, Youich Yano, Hachiro Yamada
A 500 MHz, 32 bit, 0.4 μm CMOS RISC processor. IEEE J. Solid State Circuits 29 (12) (1994)