Login / Signup
A 0.25-μm CMOS 0.9-V 100-MHz DSP core.
Masanori Izumikawa
Hiroyuki Igura
Hitoshi Wakabayashi
Ken Nakajima
Tohru Mogami
Tadahiko Horiuchi
Masakazu Yamashina
Published in:
IEEE J. Solid State Circuits (1997)
Keyphrases
</>
high speed
cmos technology
low power
digital signal processing
signal processing
digital signal processor
real time
power consumption
circuit design
focal plane
nm technology
case study
low cost
delay insensitive
data mining
website