Hana Kubátová

Publication Activity (10 Years)

Years Active: 2002-2024
Publications (10 Years): 32

Top Topics

Pearson Correlation Coefficient

Monte Carlo Simulation

Top Venues

Microprocess. Microsystems

Publications

Jakub Zahradnik, Martin Danhel, Hana Kubátová
Integration of PXROS-HR with Micro-ROS in Robotic Systems. MECO (2024)
Jan Reznícek, Martin Kohlík, Hana Kubátová
Verification of Calculations of Non-Homogeneous Markov Chains Using Monte Carlo Simulation. DSD (2022)
Vojtech Miskovský, Hana Kubátová, Martin Novotný
Secure and dependable: Area-efficient masked and fault-tolerant architectures. DSD (2021)
Karel Hynek, Tomás Benes, Tomás Cejka, Hana Kubátová
Refined Detection of SSH Brute-Force Attackers Using Machine Learning. SEC (2020)
Jan Reznícek, Martin Kohlík, Hana Kubátová
Non-homogeneous hierarchical Continuous Time Markov Chains. Microprocess. Microsystems 78 (2020)
Vojtech Procházka, Pavel Kubalík, Hana Kubátová
Low Power Wireless Data Transfer for Internet of Things: GSM Network Measuring Results. MECO (2020)
Karel Hynek, Tomás Cejka, Martin Zádník, Hana Kubátová
Evaluating Bad Hosts Using Adaptive Blacklist Filter. MECO (2020)
Jan Reznícek, Martin Kohlík, Hana Kubátová
Non-Homogeneous Continuous Time Markov Chains Calculations. DSD (2020)
Hana Kubátová
Dependability Problems in Interconnected World. MECO (2019)
Jan Reznícek, Martin Kohlík, Hana Kubátová
Accurate Inexact Calculations of Non-Homogeneous Markov Chains. DSD (2019)
Petr Socha, Vojtech Miskovský, Hana Kubátová, Martin Novotný
Efficient algorithmic evaluation of correlation power analysis: Key distinguisher based on the correlation trace derivative. Microprocess. Microsystems 71 (2019)
Jan Reznícek, Martin Kohlík, Hana Kubátová
Hierarchical Dependability Models based on Non-Homogeneous Continuous Time Markov Chains. DTIS (2019)
Vojtech Miskovský, Hana Kubátová, Martin Novotný
Speeding up differential power analysis using integrated power traces. MECO (2018)
Pavel Benácek, Viktor Pus, Hana Kubátová, Tomás Cejka
P4-To-VHDL: Automatic generation of high-speed input and output network blocks. Microprocess. Microsystems 56 (2018)
Petr Socha, Vojtech Miskovský, Hana Kubátová, Martin Novotný
Correlation Power Analysis Distinguisher Based on the Correlation Trace Derivative. DSD (2018)
Martin Danhel, Filip Stepánek, Hana Kubátová
Dependability Prediction Involving Temporal Redundancy and the Effect of Transient Faults. DSD (2017)
Petr Socha, Vojtech Miskovský, Hana Kubátová, Martin Novotný
Optimization of Pearson correlation coefficient calculation for DPA and comparison of different approaches. DDECS (2017)
Jan Riha, Vojtech Miskovský, Hana Kubátová, Martin Novotný
Influence of Fault-Tolerance Techniques on Power-Analysis Resistance of Cryptographic Design. DSD (2017)
Petr Novák, Martin Danhel, Rudolf B. Blazek, Martin Kohlík, Hana Kubátová
Predicting the Life Expectancy of Railway Fail-Safe Signaling Systems Using Dynamic Models with Censoring. QRS (2017)
Martin Danhel, Hana Kubátová
Dependability or reliability in the real world history, terminology, prediction. MECO (2017)
Martin Danhel, Filip Stepánek, Hana Kubátová
The effect of the transient faults in dependability prediction. Microprocess. Microsystems 52 (2017)
Jaroslav Borecký, Martin Kohlík, Hana Kubátová
Parity driven reconfigurable duplex system. Microprocess. Microsystems 52 (2017)
Vojtech Miskovský, Hana Kubátová, Martin Novotný
Influence of passive hardware redundancy on differential power analysis resistance of AES cipher implemented in FPGA. Microprocess. Microsystems 51 (2017)
Martin Danhel, Filip Stepánek, Hana Kubátová
The Effect of the Transient Faults in Dependability Prediction. DSD (2016)
Tomas Vanat, Filip Krizek, Jozef Ferencei, Hana Kubátová
Comparing proton and neutron induced SEU cross section in FPGA. DDECS (2016)
Vojtech Miskovský, Hana Kubátová, Martin Novotný
Influence of fault-tolerant design methods on differential power analysis resistance of AES cipher: Methodics and challenges. MECO (2016)
Tomás Cejka, Václav Bartos, Marek Svepes, Zdenek Rosa, Hana Kubátová
NEMEA: A framework for network traffic analysis. CNSM (2016)
Jaroslav Borecký, Martin Kohlík, Hana Kubátová
Parity Waterfall method. DDECS (2016)
Jaroslav Borecký, Martin Kohlík, Pavel Vit, Hana Kubátová
Enhanced Duplication Method with TMR-Like Masking Abilities. DSD (2016)
Pavel Benácek, Viktor Pus, Hana Kubátová
P4-to-VHDL: Automatic Generation of 100 Gbps Packet Parsers. FCCM (2016)
Matej Bartík, Dominika Pichlová, Hana Kubátová
Hardware-software co-design: A practical course for future embedded engineers. MECO (2016)
Hana Kubátová, Martin Novotný
Education of Computer Engineering at CTU in Prague. MECO (2016)
Tomas Vanat, Jan Pospiil, Filip Krizek, Jozef Ferencei, Hana Kubátová
A System for Radiation Testing and Physical Fault Injection into the FPGAs and Other Electronics. DSD (2015)
Tomás Cejka, Václav Bartos, Lukas Truxa, Hana Kubátová
Using Application-Aware Flow Monitoring for SIP Fraud Detection. AIMS (2015)
Pavel Benácek, Rudolf B. Blazek, Tomás Cejka, Hana Kubátová
Change-point detection method on 100 Gb/s ethernet interface. ANCS (2014)
Pavel Vit, Jaroslav Borecký, Martin Kohlík, Hana Kubátová
Fault Tolerant Duplex System with High Availability for Practical Applications. DSD (2014)
Tomás Cejka, Zdenek Rosa, Hana Kubátová
Stream-wise detection of surreptitious traffic over DNS. CAMAD (2014)
Pavel Benácek, Hana Kubátová, Viktor Pus
Architecture of Effective High-Speed Network Stream Merger. DSD (2014)
Martin Danhel, Hana Kubátová, Radek Dobias
Predictive Analysis of Mission Critical Systems Dependability. DSD (2013)
Martin Kohlík, Hana Kubátová
Hierarchical Dependability Models Based on Markov Chains. ARCS Workshops (2013)
Martin Kohlík, Hana Kubátová
Markov chains hierarchical dependability models: Worst-case computations. LATW (2013)
Tomas Vanat, Hana Kubátová
System for Radiation Testing of FPGAs. ARCS Workshops (2013)
Hana Kubátová, Paris Kitsos
Editorial of special issue: Digital System Safety and Security. Microprocess. Microsystems 37 (2) (2013)
Martin Kohlík, Hana Kubátová
Reduction of complex safety models based on Markov chains. DDECS (2012)
Martin Kohlík, Jaroslav Borecký, Hana Kubátová
Miscellaneous Types of Partial Duplication Modifications for Availability Improvements. DSD (2012)
Jaroslav Borecký, Martin Kohlík, Pavel Kubalík, Hana Kubátová
Fault Models Usability Study for On-line Tested FPGA. DSD (2011)
Jaroslav Borecký, Martin Kohlík, Hana Kubátová, Pavel Kubalík
Faults Coverage Improvement Based on Fault Simulation and Partial Duplication. DSD (2010)
Jaroslav Borecký, Pavel Kubalík, Hana Kubátová
Reliable Railway Station System Based on Regular Structure Implemented in FPGA. DSD (2009)
Petr Fiser, Hana Kubátová
Column-matching based mixed-mode test pattern generator design technique for BIST. Microprocess. Microsystems 32 (5-6) (2008)
Pavel Kubalík, Hana Kubátová
Dependable design technique for system-on-chip. J. Syst. Archit. 54 (3-4) (2008)
Radek Dobias, Jan Konarski, Hana Kubátová
Dependability Evaluation of Real Railway Interlocking Device. DSD (2008)
Petr Fiser, Pavel Kubalík, Hana Kubátová
An Efficient Multiple-Parity Generator Design for On-Line Testing on FPGA. DSD (2008)
Hana Kubátová
Dependability and testing of modern digital systems. Microprocess. Microsystems 32 (5-6) (2008)
Jirí Kvasnicka, Pavel Kubalík, Hana Kubátová
Experimental SEU Impact on Digital Design Implemented in FPGAs. DSD (2008)
Pavel Kubalík, Jirí Kvasnicka, Hana Kubátová
Fault Injection and Simulation for Fault Tolerant Reconfigurable Duplex System. DDECS (2007)
Pavel Kubalík, Radek Dobias, Hana Kubátová
Dependability Computation for Fault Tolerant Reconfigurable Duplex System. DDECS (2006)
Mitra Subhasish, Ondrej Novák, Hana Kubátová, Bashir M. Al-Hashimi, Erik Jan Marinissen, C. P. Ravikumar
Conference Reports. IEEE Des. Test Comput. 23 (4) (2006)
Pavel Kubalík, Radek Dobias, Hana Kubátová
Dependable Design for FPGA Based on Duplex System and Reconfiguration. DSD (2006)
Petr Fiser, Hana Kubátová
Flexible Two-Level Boolean Minimizer BOOM-II and Its Applications. DSD (2006)
Petr Fiser, Hana Kubátová
Multiple-Vector Column-Matching BIST Design Method. DDECS (2006)
Pavel Kubalík, Petr Fiser, Hana Kubátová
Fault Tolerant System Design Method Based on Self-Checking Circuits. IOLTS (2006)
Peter Filter, Hana Kubátová
Improvement of the Fault Coverage of the Pseudo-Random Phase in Column-Matching BIST. DSD (2005)
Radek Dobias, Pavel Kubalík, Hana Kubátová
Dependability computations for fault-tolerant system based on FPGA. ICECS (2005)
Petr Fiser, Hana Kubátová
Survey of the Algorithms in the Column-Matching BIST Method. IOLTS (2004)
Radek Dobias, Hana Kubátová
FPGA Based Design of the Railway's Interlocking Equipments. DSD (2004)
Petr Fiser, Hana Kubátová
Boolean Minimizer FC-Min: Coverage Finding Process. DSD (2004)
Petr Fiser, Jan Hlavicka, Hana Kubátová
FC-Min: A Fast Multi-Output Boolean Minimizer. DSD (2003)
Hana Kubátová, Radek Jelinek
Digital testing and reliability education (DTRE) computer tool. ICECS (2002)