P4-to-VHDL: Automatic Generation of 100 Gbps Packet Parsers.
Pavel BenácekViktor PusHana KubátováPublished in: FCCM (2016)
Keyphrases
- automatically generate
- natural language processing
- hardware implementation
- packet loss
- hardware design
- integrated circuit
- circuit design
- packet filtering
- context free grammars
- application layer
- real time
- buffer size
- network layer
- syntactic parsing
- dependency parsing
- hardware description language
- intermediate nodes
- field programmable gate array
- internet traffic
- parse tree
- end to end
- web services