Elmet Orasson

Publication Activity (10 Years)

Years Active: 2001-2016
Publications (10 Years): 4

Top Topics

Qualitative Analysis

Linear Complexity

Digital Circuits

Top Venues

VLSI-SoC (Selected Papers)

Publications

Sergei Kostin, Elmet Orasson, Raimund Ubar
A tool set for teaching design-for-testability of digital circuits. EWME (2016)
Raimund Ubar, Lembit Jurimagi, Elmet Orasson, Jaan Raik
Scalable algorithm for structural fault collapsing in digital circuits. VLSI-SoC (2015)
Raimund Ubar, Lembit Jürimägi, Elmet Orasson, Jaan Raik
Fault Collapsing in Digital Circuits Using Fast Fault Dominance and Equivalence Analysis with SSBDDs. VLSI-SoC (Selected Papers) (2015)
Raimund Ubar, Lembit Jurimagi, Elmet Orasson, Galina Josifovska, Stephen Adeboye Oyeniran
Double Phase Fault Collapsing with Linear Complexity in Digital Circuits. DSD (2015)
Raimund Ubar, Viljar Indus, Oliver Kalmend, Teet Evartson, Elmet Orasson
Functional Built-In Self-Test for processor cores in SoC. NORCHIP (2012)
Gert Jervan, Elmet Orasson, Helena Kruus, Raimund Ubar
Hybrid BIST optimization using reseeding and test set compaction. Microprocess. Microsystems 32 (5-6) (2008)
Gert Jervan, Elmet Orasson, Helena Kruus, Raimund Ubar
Hybrid BIST Optimization Using Reseeding and Test Set Compaction. DSD (2007)
Raimund Ubar, Artur Jutman, Margus Kruus, Elmet Orasson, Sergei Devadze, Heinz-Dietrich Wuttke
Learning Digital Test and Diagnostics via Internet. Int. J. Online Eng. 3 (1) (2007)
Gert Jervan, Helena Kruus, Elmet Orasson, Raimund Ubar
Optimization of Memory-Constrained Hybrid BIST for Testing Core-Based Systems. SIES (2007)
Elmet Orasson, Rein Raidma, Raimund Ubar, Gert Jervan, Zebo Peng
Fast Test Cost Calculation for Hybrid BIST in Digital Systems. DSD (2001)