Dongsuk Shin

Publication Activity (10 Years)

Years Active: 2006-2023
Publications (10 Years): 6

Top Topics

Mobile Platforms

Energy Efficiency

Mobile Applications

Top Venues

IEICE Electron. Express

ACM Trans. Embed. Comput. Syst.

Publications

Jae-Gon Lee, Younsik Choi, Hoyeon Jeon, Jong-Jin Lee, Dongsuk Shin
Fully Automated Hardware-Driven Clock-Gating Architecture With Complete Clock Coverage for 4 nm Exynos Mobile SOC. IEEE J. Solid State Circuits 58 (1) (2023)
Dongsuk Shin, Hakbeom Jang, Kiseok Oh, Jae W. Lee
An Energy-Efficient DRAM Cache Architecture for Mobile Platforms With PCM-Based Main Memory. ACM Trans. Embed. Comput. Syst. 21 (1) (2022)
Young-Duk Kim, Wookyeong Jeong, Lakkyung Jung, Dongsuk Shin, Jae Geun Song, Jinook Song, Hyeokman Kwon, Jaeyoung Lee, Jaesu Jung, Myungjin Kang, Jaehun Jeong, Yoonjoo Kwon, Nak Hee Seong
2.4 A 7nm High-Performance and Energy-Efficient Mobile Application Processor with Tri-Cluster CPUs and a Sparsity-Aware NPU. ISSCC (2020)
Dongsuk Shin, Jae W. Lee
Bandwidth-aware DRAM page migration for heterogeneous mobile memory systems. ICCE (2018)
Dongsuk Shin, Hakbeom Jang, Jae W. Lee
Erratum: Energy-efficient heterogeneous memory system for mobile platforms [IEICE Electronics Express Vol. 14 (2017) No. 24 pp. 20171002]. IEICE Electron. Express 15 (3) (2018)
Dongsuk Shin, Hakbeom Jang, Jae W. Lee
Energy-efficient heterogeneous memory system for mobile platforms. IEICE Electron. Express 14 (24) (2017)
Won-Joo Yun, Hyun-Woo Lee, Dongsuk Shin, Suki Kim
A 3.57 Gb/s/pin Low Jitter All-Digital DLL With Dual DCC Circuit for GDDR3 DRAM in 54-nm CMOS Technology. IEEE Trans. Very Large Scale Integr. Syst. 19 (9) (2011)
Dongsuk Shin, Joo-Hwan Cho, Young-Jung Choi, Byong-Tae Chung
Frequency-independent fast-lock register-controlled DLL with wide-range duty cycle adjuster. SoCC (2010)
Won-Joo Yun, Hyun-Woo Lee, Dongsuk Shin, Young-Jung Choi, Suki Kim
Coverage expandable current type code controlled DCC with TDC-based range selector. IEICE Electron. Express 6 (5) (2009)
Dongsuk Shin, Janghoon Song, Hyunsoo Chae, Chulwoo Kim
Fast Lock All-Digital DLL With a Wide Range and High Resolution DCC. IEEE J. Solid State Circuits 44 (9) (2009)
Dongsuk Shin, Jabeom Koo, Won-Joo Yun, Young-Jung Choi, Chulwoo Kim
A Fast-lock Synchronous Multi-phase Clock Generator based on a Time-to-digital Converter. ISCAS (2009)
Moo-young Kim, Dongsuk Shin, Hyunsoo Chae, Chulwoo Kim
A Low-Jitter Open-Loop All-Digital Clock Generator With Two-Cycle Lock-Time. IEEE Trans. Very Large Scale Integr. Syst. 17 (10) (2009)
Dongsuk Shin, Soo-Won Kim, Chulwoo Kim
Wide frequency range duty cycle correction circuit for DDR interface. IEICE Electron. Express 5 (8) (2008)
Won-Joo Yun, Hyun-Woo Lee, Dongsuk Shin, Shin-Deok Kang, Ji-Yeon Yang, Hyeng-Ouk Lee, Dong-Uk Lee, Sujeong Sim, Young-Ju Kim, Won-Jun Choi, Keun-Soo Song, Sang-Hoon Shin, Hyang-Hwa Choi, Hyung-Wook Moon, Seung-Wook Kwack, Jung-Woo Lee, Young-Kyoung Choi, Nak-Kyu Park, Kwan-Weon Kim, Young-Jung Choi, Jin-Hong Ahn, Ye Seok Yang
A 0.1-to-1.5GHz 4.2mW All-Digital DLL with Dual Duty-Cycle Correction Circuit and Update Gear Circuit for DRAM in 66nm CMOS Technology. ISSCC (2008)
Won-Joo Yun, Dongsuk Shin, Suki Kim
A 4-bit 2GSamples/s parallel Flash ADC using comb-type reference ladder. IEICE Electron. Express 5 (15) (2008)
Dongsuk Shin, Won-Joo Yun, Hyun-Woo Lee, Young-Jung Choi, Suki Kim, Chulwoo Kim
A 0.17-1.4GHz low-jitter all digital DLL with TDC-based DCC using pulse width detection scheme. ESSCIRC (2008)
Dongsuk Shin, Janghoon Song, Hyunsoo Chae, Kwan-Weon Kim, Young-Jung Choi, Chulwoo Kim
A 7ps-Jitter 0.053mm2 Fast-Lock ADDLL with Wide-Range and High-Resolution All-Digital DCC. ISSCC (2007)
Moo-young Kim, Dongsuk Shin, Hyunsoo Chae, Sunghwa Ok, Chulwoo Kim
A Low-Jitter Open-Loop All-Digital Clock Generator with 2 Cycle Lock-Time. CICC (2007)
Inhwa Jung, Moo-young Kim, Dongsuk Shin, Seon Wook Kim, Chulwoo Kim
A New Energy x Delay-Aware Flip-Flop. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (6) (2006)