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Moo-young Kim
Publication Activity (10 Years)
Years Active: 2005-2012
Publications (10 Years): 0
Top Topics
Evolvable Hardware
Camera Parameters
Phase Locked Loop
Top Venues
IEEE Trans. Very Large Scale Integr. Syst.
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Publications
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Moo-young Kim
,
Hokyu Lee
,
Chulwoo Kim
PVT Variation Tolerant Current Source With On-Chip Digital Self-Calibration.
IEEE Trans. Very Large Scale Integr. Syst.
20 (4) (2012)
Moo-young Kim
,
Jinwoo Kim
,
Tagjong Lee
,
Chulwoo Kim
10-bit 100-MS/s Pipelined ADC Using Input-Swapped Opamp Sharing and Self-Calibrated V/I Converter.
IEEE Trans. Very Large Scale Integr. Syst.
19 (8) (2011)
Moo-young Kim
,
Dongsuk Shin
,
Hyunsoo Chae
,
Chulwoo Kim
A Low-Jitter Open-Loop All-Digital Clock Generator With Two-Cycle Lock-Time.
IEEE Trans. Very Large Scale Integr. Syst.
17 (10) (2009)
Inhwa Jung
,
Moo-young Kim
,
Chulwoo Kim
A 1.2GHz delayed clock generator for high-speed microprocessors.
ASP-DAC
(2008)
Inhwa Jung
,
Gunok Jung
,
Janghoon Song
,
Moo-young Kim
,
Junyoung Park
,
Sung-Bae Park
,
Chulwoo Kim
Portable Multiphase Clock Generator Tile for 1.2-GHz RISC Microprocessor.
IEEE Trans. Circuits Syst. II Express Briefs
(2) (2008)
Moo-young Kim
,
Dongsuk Shin
,
Hyunsoo Chae
,
Sunghwa Ok
,
Chulwoo Kim
A Low-Jitter Open-Loop All-Digital Clock Generator with 2 Cycle Lock-Time.
CICC
(2007)
Inhwa Jung
,
Moo-young Kim
,
Chulwoo Kim
Sptpl: a New Pulsed Latch Type Flip-Flop in High-Performance System-on-a-Chip (SOC).
J. Circuits Syst. Comput.
16 (2) (2007)
Jin-Han Kim
,
Young-Ho Kwak
,
Moo-young Kim
,
Soo-Won Kim
,
Chulwoo Kim
A 120-MHz-1.8-GHz CMOS DLL-Based Clock Generator for Dynamic Frequency Scaling.
IEEE J. Solid State Circuits
41 (9) (2006)
Inhwa Jung
,
Moo-young Kim
,
Dongsuk Shin
,
Seon Wook Kim
,
Chulwoo Kim
A New Energy x Delay-Aware Flip-Flop.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
(6) (2006)
Moo-young Kim
,
Inhwa Jung
,
Young-Ho Kwak
,
Sunghoon Ahn
,
Chulwoo Kim
Differential Pass Transistor Pulsed Latch.
SoCC
(2005)