Fully Automated Hardware-Driven Clock-Gating Architecture With Complete Clock Coverage for 4 nm Exynos Mobile SOC.
Jae-Gon LeeYounsik ChoiHoyeon JeonJong-Jin LeeDongsuk ShinPublished in: IEEE J. Solid State Circuits (2023)
Keyphrases
- fully automated
- clock gating
- power consumption
- fpga device
- low power
- power reduction
- hardware implementation
- fully automatic
- semi automated
- power management
- field programmable gate array
- real time
- power dissipation
- cmos technology
- hardware and software
- hardware architecture
- high speed
- hardware software co design
- labor intensive
- low cost
- energy efficiency
- energy saving
- power saving
- embedded systems
- completely automated
- mobile networks
- digital signal processing
- multithreading
- signal processing
- image sensor
- data center
- hardware software
- operating system
- context aware