Cyrus Bamji

Publication Activity (10 Years)

Years Active: 1985-2004
Publications (10 Years): 0

Massachusetts Institute of Technology, Cambridge, MA, USA (PHD)

Education History

Massachusetts Institute of Technology, Cambridge, MA, USA

PHD

Publications

S. Burak Gokturk, Hakan Yalcin, Cyrus Bamji
A Time-Of-Flight Depth Sensor - System Description, Issues and Solutions. CVPR Workshops (2004)
Hakan Yalcin, Robert Palermo, Mohammad Mortazavi, Cyrus Bamji, Karem A. Sakallah, John P. Hayes
An Advanced Timing Characterization Method Using Mode Dependency. DAC (2001)
Hakan Yalcin, Mohammad Mortazavi, Robert Palermo, Cyrus Bamji, Karem A. Sakallah, John P. Hayes
Fast and accurate timing characterization using functionalinformation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20 (2) (2001)
Yanbin Jiang, Sachin S. Sapatnekar, Cyrus Bamji
Technology mapping for high-performance static CMOS and pass transistor logic designs. IEEE Trans. Very Large Scale Integr. Syst. 9 (5) (2001)
Pawan Kulshreshtha, Robert Palermo, Mohammad Mortazavi, Cyrus Bamji, Hakan Yalcin
Transistor-Level Timing Analysis Using Embedded Simulation. ICCAD (2000)
Hakan Yalcin, Mohammad Mortazavi, Robert Palermo, Cyrus Bamji, Karem A. Sakallah
Functional Timing Analysis for IP Characterization. DAC (1999)
Yanbin Jiang, Sachin S. Sapatnekar, Cyrus Bamji, Juho Kim
Combined transistor sizing with buffer insertion for timing optimization. CICC (1998)
Yanbin Jiang, Sachin S. Sapatnekar, Cyrus Bamji
A fast global gate collapsing technique for high performance designs using static CMOS and pass transistor logic. ICCD (1998)
Cyrus Bamji, Manjit Borah
An Improved Cost Heuristic for Transistor Sizing. VLSI Design (1998)
Yanbin Jiang, Sachin S. Sapatnekar, Cyrus Bamji, Juho Kim
Interleaving buffer insertion and transistor sizing into a single optimization. IEEE Trans. Very Large Scale Integr. Syst. 6 (4) (1998)
Cyrus Bamji, Ravi Varadarajan
Incremental Autojogging using Range Spaces. VLSI Design (1998)
Juho Kim, Cyrus Bamji, Yanbin Jiang, Sachin S. Sapatnekar
Concurrent transistor sizing and buffer insertion by considering cost-delay tradeoffs. ISPD (1997)
Cyrus Bamji, Enrico Malavasi
Enhanced Network Flow Algorithm for Yield Optimization. DAC (1996)
Cyrus Bamji, Jonathan Allen
GLOVE: A Graph-Based Layout Verifier. VLSI Design (1994)
Cyrus Bamji, Ravi Varadarajan
MSTC: A Method for Identifying Overconstraints during Hierarchical Compaction. DAC (1993)
Ravi Varadarajan, Cyrus Bamji
Cloning techniques for hierarchical compaction. ICCAD (1992)
Cyrus Bamji, Ravi Varadarajan
Hierarchical Pitchmatching Compaction Using Minimum Design. DAC (1992)
Cyrus Bamji, Jonathan Allen
GRASP: A Grammar-based Schematic Parser. DAC (1989)
Cyrus Bamji, Charles E. Hauck, Jonathan Allen
A design by example regular structure generator. DAC (1985)
Charles E. Hauck, Cyrus Bamji, Jonathan Allen
The systematic exploration of pipelined array multiplier performance. ICASSP (1985)

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Publication Activity (10 Years)

Cyrus Bamji