A fast global gate collapsing technique for high performance designs using static CMOS and pass transistor logic.
Yanbin JiangSachin S. SapatnekarCyrus BamjiPublished in: ICCD (1998)
Keyphrases
- nm technology
- low power
- high speed
- metal oxide semiconductor
- power dissipation
- embedded dram
- power consumption
- flip flops
- cmos technology
- delay insensitive
- low cost
- floating gate
- circuit design
- integrated circuit
- silicon dioxide
- modal logic
- chip design
- low power consumption
- neural network
- predicate logic
- global information
- real time
- multiple input
- digital circuits
- random access memory
- multi valued
- automated reasoning
- high efficiency
- logic programming
- logic programs