Chung Hon Lam

Publication Activity (10 Years)

Years Active: 1995-2016
Publications (10 Years): 1

Top Topics

Recent Progress

Physical Design

Top Venues

IEEE J. Emerg. Sel. Topics Circuits Syst.

IEEE Trans. Circuits Syst. I Regul. Pap.

ACM J. Emerg. Technol. Comput. Syst.

Publications

Geoffrey W. Burr, Matthew J. BrightSky, Abu Sebastian, Huai-Yu Cheng, Jau-Yi Wu, SangBum Kim, Norma E. Sosa, Nikolaos Papandreou, Hsiang-Lan Lung, Haralampos Pozidis, Evangelos Eleftheriou, Chung Hon Lam
Recent Progress in Phase-Change Memory Technology. IEEE J. Emerg. Sel. Topics Circuits Syst. 6 (2) (2016)
Bryan L. Jackson, Bipin Rajendran, Gregory S. Corrado, Matthew J. Breitwisch, Geoffrey W. Burr, Roger Cheek, Kailash Gopalakrishnan, Simone Raoux, Charles T. Rettner, Alvaro Padilla, Alejandro G. Schrott, Rohit S. Shenoy, Bülent N. Kurdi, Chung Hon Lam, Dharmendra S. Modha
Nanoscale electronic synapses using phase change devices. ACM J. Emerg. Technol. Comput. Syst. 9 (2) (2013)
Gael F. Close, Urs Frey, Jack Morrish, Richard Jordan, Scott C. Lewis, Tom Maffitt, M. J. BrightSky, Christoph Hagleitner, Chung Hon Lam, Evangelos Eleftheriou
A 256-Mcell Phase-Change Memory Chip Operating at 2+ Bit/Cell. IEEE Trans. Circuits Syst. I Regul. Pap. (6) (2013)
Nikolaos Papandreou, Haralampos Pozidis, Aggeliki Pantazi, Abu Sebastian, Matthew J. Breitwisch, Chung Hon Lam, Evangelos Eleftheriou
Programming algorithms for multilevel phase-change memory. ISCAS (2011)
Nikolaos Papandreou, Aggeliki Pantazi, Abu Sebastian, Matthew J. Breitwisch, Chung Hon Lam, Haralampos Pozidis, Evangelos Eleftheriou
Multilevel phase-change memory. ICECS (2010)
Simone Raoux, Geoffrey W. Burr, Matthew J. Breitwisch, Charles T. Rettner, Yi-Chou Chen, Robert M. Shelby, Martin Salinga, Daniel Krebs, Shih-Hung Chen, Hsiang-Lan Lung, Chung Hon Lam
Phase-change random access memory: A scalable technology. IBM J. Res. Dev. 52 (4-5) (2008)
Geoffrey W. Burr, Bülent N. Kurdi, J. Campbell Scott, Chung Hon Lam, Kailash Gopalakrishnan, Rohit S. Shenoy
Overview of candidate device technologies for storage-class memory. IBM J. Res. Dev. 52 (4-5) (2008)
Siegfried F. Karg, Gerhard Ingmar Meijer, J. Georg Bednorz, Charles T. Rettner, Alejandro G. Schrott, Eric A. Joseph, Chung Hon Lam, Markus Janousch, Urs Staub, Fabio LaMattina, Santos F. Alvarado, Daniel Widmer, Richard Stutz, Ute Drechsler, Daniele Caimi
Transition-metal-oxide-based resistance-change memories. IBM J. Res. Dev. 52 (4-5) (2008)
Matthew J. Breitwisch, Chung Hon Lam, Jeffrey B. Johnson, Steven W. Mittl, Jian W. Zhu
A novel CMOS compatible embedded nonvolatile memory with zero process adder. MTDT (2005)
Randy W. Mann, W. W. (Bill) Abadeer, Matthew J. Breitwisch, O. Bula, Jeff S. Brown, Bryant C. Colwill, Peter E. Cottrell, William T. Crocco Jr., Stephen S. Furkay, Michael J. Hauser, Terence B. Hook, Dennis Hoyniak, James M. Johnson, Chung Hon Lam, Rebecca D. Mih, J. Rivard, Atsushi Moriwaki, E. Phipps, Christopher S. Putnam, BethAnn Rainey, James J. Toomey, Mohammad Imran Younus
Ultralow-power SRAM technology. IBM J. Res. Dev. 47 (5-6) (2003)
Charles W. Koburger III, William F. Clark, James W. Adkisson, Eric Adler, Paul E. Bakeman, Albert S. Bergendahl, Alan B. Botula, W. Chang, Bijan Davari, John H. Givens, Howard H. Hansen, Steven J. Holmes, David V. Horak, Chung Hon Lam, Jerome B. Lasky, Stephen E. Luce, Randy W. Mann, Glen L. Miles, James S. Nakos, Edward J. Nowak, Ghavam Shahidi, Yuan Taur, Francis R. White, Matthew R. Wordeman
A half-micron CMOS logic generation. IBM J. Res. Dev. 39 (1-2) (1995)