A 256-Mcell Phase-Change Memory Chip Operating at 2+ Bit/Cell.

Gael F. Close Urs Frey Jack Morrish Richard Jordan Scott C. Lewis Tom Maffitt M. J. BrightSky Christoph Hagleitner Chung Hon Lam Evangelos Eleftheriou

Published in: IEEE Trans. Circuits Syst. I Regul. Pap. (2013)

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