Cheng-Liang Hung

Publication Activity (10 Years)

Years Active: 2007-2014
Publications (10 Years): 0

Top Topics

Parallel Processing

Computational Complexity

Top Venues

IEEE Trans. Circuits Syst. II Express Briefs

Publications

Kuo-Hsing Cheng, Cheng-Liang Hung, Cihun-Siyong Alex Gong, Jen-Chieh Liu, Bo-Qian Jiang, Shi-Yang Sun
A 0.9- to 8-GHz VCO With a Differential Active Inductor for Multistandard Wireline SerDes. IEEE Trans. Circuits Syst. II Express Briefs (8) (2014)
Bo-Qian Jiang, Cheng-Liang Hung, Bing-Hung Chen, Kuo-Hsing Cheng
A 6-Gb/s 3X-oversampling-like clock and data recovery in 0.13-µm CMOS technology. ISCAS (2012)
Cheng-Liang Hung, Kuo-Hsing Cheng, Yu-Chen Lin, Bo-Qian Jiang, Che-hao Fan, Chi-Yang Chang
A 0.06-psRMS SSC-induced jitter, ΔΣ-dithering-free, 6-GHz spread-spectrum clock generator for serial-ATA generation. ESSCIRC (2011)
Kuo-Hsing Cheng, Cheng-Liang Hung, Chih-Hsien Chang
A 0.77 ps RMS Jitter 6-GHz Spread-Spectrum Clock Generator Using a Compensated Phase-Rotating Technique. IEEE J. Solid State Circuits 46 (5) (2011)
Yo-Hao Tu, Hsiang-Hao Chang, Cheng-Liang Hung, Kuo-Hsing Cheng
A 3 GHz DLL-based clock generator with stuck locking protection. ICECS (2010)
Kuo-Hsing Cheng, Cheng-Liang Hung, Chih-Hsien Chang, Yu-Lung Lo, Wei-Bin Yang, Jiunn-Way Miaw
A Spread-Spectrum Clock Generator Using Fractional PLL Controlled Delta-Sigma Modulator for Serial-ATA III. DDECS (2008)
Kuo-Hsing Cheng, Cheng-Liang Hung, Chia-Wei Su
A Sub-1V Low-Power High-Speed Static Frequency Divider. ISCAS (2007)