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A 0.06-psRMS SSC-induced jitter, ΔΣ-dithering-free, 6-GHz spread-spectrum clock generator for serial-ATA generation.
Cheng-Liang Hung
Kuo-Hsing Cheng
Yu-Chen Lin
Bo-Qian Jiang
Che-hao Fan
Chi-Yang Chang
Published in:
ESSCIRC (2011)
Keyphrases
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spread spectrum
high speed
image watermarking
data hiding
transform domain
power consumption
bit error rate
watermarking scheme
direct sequence spread spectrum
image sequences
watermarking algorithm
signal to noise ratio
error diffusion
jpeg compression
digital watermarking