Bulent I. Dervisoglu

Publication Activity (10 Years)

Years Active: 1974-2002
Publications (10 Years): 0

University of Edinburgh, UK (PHD)

Education History

University of Edinburgh, UK

PHD

Publications

Fidel Muradali, Mike Ricchetti, Bart Vermeulen, Bulent I. Dervisoglu, Bob Gottlieb, Bernd Koenemann, C. J. Clark
Reducing Time to Volume and Time to Market: Is Silicon Debug and Diagnosis the Answer? VTS (2002)
Bulent I. Dervisoglu
A Unified DFT Architecture for Use with IEEE 1149.1 and VSIA/IEEE P1500 Compliant Test Access Controllers. DAC (2001)
Bulent I. Dervisoglu
Design for testability: it is time to deliver it for Time-to-Market. ITC (1999)
Bulent I. Dervisoglu, Mike Ricchetti, William Eklow
Shared I/O-cell structures: a framework for extending the IEEE 1149.1 boundary-scan standard. ITC (1998)
Bulent I. Dervisoglu
Special Report: Shared-I/O Scan Test. IEEE Des. Test Comput. 12 (4) (1995)
Jacob A. Abraham, Sandip Kundu, Janak H. Patel, Manuel A. d'Abreu, Bulent I. Dervisoglu, Marc E. Levitt, Hector R. Sucar, Ron G. Walther
Microprocessor Testing: Which Technique is Best? (Panel). DAC (1994)
Bulent I. Dervisoglu
Boundary-Scan Update: IEEE P1149.2 Description and Status Report. IEEE Des. Test Comput. 9 (3) (1992)
Bulent I. Dervisoglu, Gayvin E. Stong
Application of Scan-Based DFT Methodology for Detecting Static and Timing Failures in VLSI Components. VLSI (1991)
Bulent I. Dervisoglu, Gayvin E. Stong
Design for Testability: Using Scanpath Techniques for Path-Delay Test and Measurement. ITC (1991)
Bulent I. Dervisoglu
Features of a Scan and Clock Resource chip for providing access to board-level test functions. J. Electron. Test. 2 (1) (1991)
Bulent I. Dervisoglu
Towards a standard approach for controlling board-level test functions. ITC (1990)
Bulent I. Dervisoglu
Application of scan hardware and software for debug and diagnostics in a workstation environment. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9 (6) (1990)
Bulent I. Dervisoglu
Scan-path architecture for pseudorandom testing. IEEE Des. Test 6 (4) (1989)
Bulent I. Dervisoglu, M. A. Keil
ATLAS/ELA: Scan-based Software Tools for Reducing System Debug Time in a State-of-the-art Workstation. DAC (1989)
Bulent I. Dervisoglu
Using Scan Technology for Debug and Diagnostics in a Workstation Environment. ITC (1988)
Bulent I. Dervisoglu
On Coosing a Hardware Descriptive Language for Digital Systems Testing/Verification. ITC (1984)
Bulent I. Dervisoglu, Donald J. Criscione
A Hard Progammable Control Unit Design Using VLSI Technology. IEEE Trans. Computers 30 (10) (1981)
Bulent I. Dervisoglu, Howard A. Sholl
Theory and Design of Mixed-Mode Sequential Machines. IEEE Trans. Computers 29 (7) (1980)
Bulent I. Dervisoglu
Hardware description languages in Great Britain. Computer 7 (12) (1974)

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Publication Activity (10 Years)

Bulent I. Dervisoglu