Bechir Ayari

Publication Activity (10 Years)

Years Active: 1994-2000
Publications (10 Years): 0

Publications

Bechir Ayari, Prab Varma
Test Cycle Count Reduction in a Parallel Scan BIST Environment. J. Electron. Test. 16 (5) (2000)
Bechir Ayari, Prab Varma
Test Cycle Count Reduction in a Parallel Scan BIST Environment. Asian Test Symposium (1998)
Naim Ben-Hamida, Bechir Ayari, Bozena Kaminska
Testing of embedded A/D converters in mixed-signal circuit. ICCD (1996)
Samir Lejmi, Bozena Kaminska, Bechir Ayari
Retiming, resynthesis, and partitioning for the pseudo-exhaustive testing of sequential circuits. VTS (1995)
Bechir Ayari, Bozena Kaminska
BDD-FTEST: Fast, Backtrack-Free Test Generator Based on Binary Decision Diagram Representation. ISCAS (1995)
Samir Lejmi, Bozena Kaminska, Bechir Ayari
Synthesis and Retiming for the Pseudo-Exhaustive BIST of Synchronous Sequential Circuits. ITC (1995)
Bechir Ayari, Naim Ben-Hamida, Bozena Kaminska
Automatic test vector generation for mixed-signal circuits. ED&TC (1995)
Samir Lejmi, Bozena Kaminska, Bechir Ayari
Retiming for BIST-Sequential Circuits. ISCAS (1995)
Bechir Ayari, Bozena Kaminska
A new dynamic test vector compaction for automatic test pattern generation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13 (3) (1994)