Arash Saifhashemi

Publication Activity (10 Years)

Years Active: 2003-2017
Publications (10 Years): 2

Top Topics

Delay Insensitive

Power Consumption

Global Optimization

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Arash Saifhashemi, Hsin-Ho Huang, Peter A. Beerel
Reconditioning: A Framework for Automatic Power Optimization of QDI Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36 (2) (2017)
Arash Saifhashemi, Hsin-Ho Huang, Priyanka Bhalerao, Peter A. Beerel
Logical equivalence checking of asynchronous circuits using commercial tools. DATE (2015)
Arash Saifhashemi, Dylan Hand, Peter A. Beerel, William Koven, Hong Wang
Performance and Area Optimization of a Bundled-Data Intel Processor through Resynthesis. ASYNC (2014)
Arash Saifhashemi, Hsin-Ho Huang, Peter A. Beerel
Reconditioning: Automatic Power Optimization of QDI Circuits. ASYNC (2014)
Arash Saifhashemi, Peter A. Beerel
Observability Conditions and Automatic Operand-Isolation in High-Throughput Asynchronous Pipelines. PATMOS (2012)
Arash Saifhashemi, Peter A. Beerel
SystemVerilogCSP: Modeling Digital Asynchronous Circuits Using SystemVerilog Interfaces. CPA (2011)
Jo C. Ebergen, Steve Furber, Arash Saifhashemi
Notes On Pulse Signaling. ASYNC (2007)
Arash Saifhashemi, Peter A. Beerel
High Level Modeling of Channel-Based Asynchronous Circuits Using Verilog. CPA (2005)
Behnam Salemi, Jorge Reis, Arash Saifhashemi, Fred Nikgohar
MILO: personal robot platform. IROS (2005)
Arash Saifhashemi, Hossein Pedram
Verilog HDL, powered by PLI: a suitable framework for describing and modeling asynchronous circuits at all levels of abstraction. DAC (2003)