Akira Jinguji

Publication Activity (10 Years)

Years Active: 2016-2023
Publications (10 Years): 16

Top Topics

Convolutional Neural Network

Multilayer Perceptron

Top Venues

IEICE Trans. Inf. Syst.

Publications

Ryota Kayanoma, Akira Jinguji, Hiroki Nakahara
A Many-core Architecture for an Ensemble Ternary Neural Network Toward High-Throughput Inference. MCSoC (2023)
Takeshi Senoo, Ryota Kayanoma, Akira Jinguji, Hiroki Nakahara
A Light-Weight Vision Transformer Toward Near Memory Computation on an FPGA. ARC (2023)
Takeshi Senoo, Akira Jinguji, Ryosuke Kuramochi, Hiroki Nakahara
Multilayer Perceptron Training Accelerator Using Systolic Array. IEICE Trans. Inf. Syst. (12) (2022)
Takeshi Senoo, Akira Jinguji, Ryosuke Kuramochi, Hiroki Nakahara
A Multilayer Perceptron Training Accelerator using Systolic Array. APCCAS (2021)
Akira Jinguji, Shimpei Sato, Hiroki Nakahara
Weight Sparseness for a Feature-Map-Split-CNN Toward Low-Cost Embedded FPGAs. IEICE Trans. Inf. Syst. (12) (2021)
Youki Sada, Naoto Soga, Masayuki Shimoda, Akira Jinguji, Shimpei Sato, Hiroki Nakahara
Fast Monocular Depth Estimation on an FPGA. IPDPS Workshops (2020)
Hiroki Nakahara, Zhiqiang Que, Akira Jinguji, Wayne Luk
R2CNN: Recurrent Residual Convolutional Neural Network on FPGA. FPGA (2020)
Akira Jinguji, Shimpei Sato, Hiroki Nakahara
Tiny On-Chip Memory Realization of Weight Sparseness Split-CNNs on Low-end FPGAs. FCCM (2020)
Akira Jinguji, Youki Sada, Hiroki Nakahara
Real-Time Multi-Pedestrian Detection in Surveillance Camera using FPGA. FPL (2019)
Hiroki Nakahara, Akira Jinguji, Masayuki Shimoda, Shimpei Sato
An FPGA-based Fine Tuning Accelerator for a Sparse CNN. FPGA (2019)
Hiroki Nakahara, Youki Sada, Masayuki Shimoda, Kouki Sayama, Akira Jinguji, Shimpei Sato
FPGA-Based Training Accelerator Utilizing Sparseness of Convolutional Neural Network. FPL (2019)
Youki Sada, Masayuki Shimoda, Akira Jinguji, Hiroki Nakahara
A Dataflow Pipelining Architecture for Tile Segmentation with a Sparse MobileNet on an FPGA. FPT (2019)
Akira Jinguji, Shimpei Sato, Hiroki Nakahara
-Means Clustering Using a High-Level Synthesis Design. IEICE Trans. Inf. Syst. (2) (2018)
Akira Jinguji, Tomoya Fujii, Shimpei Sato, Hiroki Nakahara
An FPGA Realization of OpenPose Based on a Sparse Weight Convolutional Neural Network. FPT (2018)
Hiroki Nakahara, Akira Jinguji, Simpei Sato, Tsutomu Sasao
A Random Forest Using a Multi-valued Decision Diagram on an FPGA. ISMVL (2017)
Hiroki Nakahara, Akira Jinguji, Tomonori Fujii, Simpei Sato
An acceleration of a random forest classification using Altera SDK for OpenCL. FPT (2016)