Tiny On-Chip Memory Realization of Weight Sparseness Split-CNNs on Low-end FPGAs.
Akira JingujiShimpei SatoHiroki NakaharaPublished in: FCCM (2020)
Keyphrases
- low end
- high end
- cellular neural networks
- memory subsystem
- high speed
- memory access
- low bit rate
- field programmable gate array
- level parallelism
- low cost
- hardware implementation
- embedded systems
- reconfigurable hardware
- random access memory
- application specific integrated circuits
- computing systems
- multithreading
- computer systems