Youki Sada

Publication Activity (10 Years)

Years Active: 2019-2022
Publications (10 Years): 11

Top Topics

Field Programmable Gate Array

Depth Estimates

Fpga Implementation

Convolutional Neural Networks

Top Venues

IEICE Trans. Inf. Syst.

Publications

Youki Sada, Seiya Shibata, Yuki Kobayashi, Takashi Takenaka
RegionDrop: Fast Human Pose Estimation Using Annotation-Aware Spatial Sparsity. ICANN (4) (2022)
Masayuki Shimoda, Youki Sada, Hiroki Nakahara
FPGA-Based Inter-layer Pipelined Accelerators for Filter-Wise Weight-Balanced Sparse Fully Convolutional Networks with Overlapped Tiling. J. Signal Process. Syst. 93 (5) (2021)
Masayuki Shimoda, Youki Sada, Ryosuke Kuramochi, Shimpei Sato, Hiroki Nakahara
SENTEI: Filter-Wise Pruning with Distillation towards Efficient Sparse Convolutional Neural Network Accelerators. IEICE Trans. Inf. Syst. (12) (2020)
Youki Sada, Naoto Soga, Masayuki Shimoda, Akira Jinguji, Shimpei Sato, Hiroki Nakahara
Fast Monocular Depth Estimation on an FPGA. IPDPS Workshops (2020)
Masayuki Shimoda, Youki Sada, Ryosuke Kuramochi, Hiroki Nakahara
An FPGA Implementation of Real-Time Object Detection with a Thermal Camera. FPL (2019)
Ryosuke Kuramochi, Youki Sada, Masayuki Shimoda, Shimpei Sato, Hiroki Nakahara
Many Universal Convolution Cores for Ensemble Sparse Convolutional Neural Networks. MCSoC (2019)
Akira Jinguji, Youki Sada, Hiroki Nakahara
Real-Time Multi-Pedestrian Detection in Surveillance Camera using FPGA. FPL (2019)
Masayuki Shimoda, Youki Sada, Hiroki Nakahara
Filter-Wise Pruning Approach to FPGA Implementation of Fully Convolutional Network for Semantic Segmentation. ARC (2019)
Hiroki Nakahara, Youki Sada, Masayuki Shimoda, Kouki Sayama, Akira Jinguji, Shimpei Sato
FPGA-Based Training Accelerator Utilizing Sparseness of Convolutional Neural Network. FPL (2019)
Ryosuke Kuramochi, Masayuki Shimoda, Youki Sada, Shimpei Sato, Hiroki Nakahara
FPGA-based Accurate Pedestrian Detection with Thermal Camera for Surveillance System. ReConFig (2019)
Youki Sada, Masayuki Shimoda, Akira Jinguji, Hiroki Nakahara
A Dataflow Pipelining Architecture for Tile Segmentation with a Sparse MobileNet on an FPGA. FPT (2019)