An FPGA-based Fine Tuning Accelerator for a Sparse CNN.
Hiroki NakaharaAkira JingujiMasayuki ShimodaShimpei SatoPublished in: FPGA (2019)
Keyphrases
- fine tuning
- field programmable gate array
- viable alternative
- cellular neural networks
- fine tune
- convolutional neural network
- application specific
- high dimensional
- parallel implementation
- fine tuned
- sparse data
- hardware implementation
- compressed sensing
- embedded systems
- sparse representation
- canonical correlation analysis
- clustering algorithm