Adel Baganne

Publication Activity (10 Years)

Years Active: 1997-2019
Publications (10 Years): 5

Top Topics

Embedded Devices

Top Venues

Microprocess. Microsystems

Publications

Med fehmi Chatmen, Adel Baganne, Rached Tourki
Low latency multicasting architecture implemented using new network topology. Microprocess. Microsystems 68 (2019)
Fatma Sbiaa, Sonia Kotel, Zeghid Medien, Rached Tourki, Mohsen Machhout, Adel Baganne
High-Level Implementation of a Chaotic and AES Based Crypto-System. J. Circuits Syst. Comput. 26 (7) (2017)
Fatma Sbiaa, Sonia Kotel, Zeghid Medien, Rached Tourki, Mohsen Machhout, Adel Baganne
A Selective Encryption Scheme with Multiple Security Levels for the H.264/AVC Video Coding Standard. CIT (2016)
Sonia Kotel, Fatma Sbiaa, Zeghid Medien, Mohsen Machhout, Adel Baganne, Rached Tourki
Efficient Hybrid Encryption System Based on Block Cipher and Chaos Generator. CIT (2016)
Sonia Kotel, Fatma Sbiaa, Zeghid Medien, Mohsen Machhout, Adel Baganne, Rached Tourki
Performance evaluation and design considerations of lightweight block cipher for low-cost embedded devices. AICCSA (2016)
Fatma Sbiaa, Adel Baganne, Zeghid Medien, Rached Tourki
A new approach for encryption system based on block cipher algorithms and logistic function. SSD (2015)
Meriam Kallel, Younes Lahbib, Adel Baganne, Rached Tourki
Monitoring transaction level SystemC models using a generic and aspect-oriented framework. Int. J. Comput. Aided Eng. Technol. 4 (3) (2012)
Zeghid Medien, Mohsen Machhout, Belgacem Bouallegue, Lazhar Khriji, Adel Baganne, Rached Tourki
Design and Hardware Implementation of QoSS - AES Processor for Multimedia applications. Trans. Data Priv. 3 (1) (2010)
Rafik Ben-Tekaya, Adel Baganne, Kholdoun Torki, Rached Tourki
Performance evaluation of MIC@R NoC for real-time applications. Int. J. Comput. Aided Eng. Technol. 2 (2/3) (2010)
Mounir Zid, Abdelkrim Zitouni, Adel Baganne, Rached Tourki
Nouvelles architectures génériques de NoC. Tech. Sci. Informatiques 28 (1) (2009)
Philippe Coussy, Emmanuel Casseau, Pierre Bomel, Adel Baganne, Eric Martin
Constrained algorithmic IP design for system-on-chip. Integr. 40 (2) (2007)
Zeghid Medien, Belgacem Bouallegue, Adel Baganne, Mohsen Machhout, Rached Tourki
A Reconfigurable Implementation of the New Secure Hash Algorithm. ARES (2007)
Rafik Ben-Tekaya, Adel Baganne, Rached Tourki
MIC@R : A Generic Low Latency Router for On-Chip Networks. ICECS (2007)
Philippe Coussy, Emmanuel Casseau, Pierre Bomel, Adel Baganne, Eric Martin
A formal method for hardware IP design and integration under I/O and timing constraints. ACM Trans. Embed. Comput. Syst. 5 (1) (2006)
Philippe Coussy, David Gnaedig, Amor Nafkha, Adel Baganne, Emmanuel Boutillon, Eric Martin
A methodology for IP integration into DSP SoC: a case study of a MAP algorithm for turbo decoder. ICASSP (5) (2004)
Mehrez Marzougui, Mohamed Abid, Adel Baganne, Rached Tourki
Co-simulation and communication synthesis approach for intellectual properties based SoCs. Comput. Electr. Eng. 30 (5) (2004)
Adel Baganne, Imed Bennour, Mehrez Elmarzougui, Riadh Gaiech, Eric Martin
A Multi-Level Design Flow for Incorporating IP Cores: Case Study of 1D Wavelet IP Integration. DATE (2003)
Adel Baganne, Imed Bennour, Mehrez Elmarzougui, Eric Martin
A simulation based approach for incorporating virtual components IP cores into multimedia systems design. ICME (2003)
Philippe Coussy, Adel Baganne, Eric Martin
Communication and Timing Constraints Analysis for IP Design and Integration. VLSI-SOC (2003)
Adel Baganne, Imed Bennour, Mehrez Elmarzougui, Eric Martin
A simulation based approach for incorporating virtual components IP cores into multimedia systems design. ICASSP (2) (2003)
Philippe Coussy, Adel Baganne, Eric Martin
A design methodology for integrating IP into SOC systems. CICC (2002)
Philippe Coussy, Adel Baganne, Eric Martin
Virtual component IP re-use in telecommunication systems design: a case study of MPEG-2/JPEG2000 encoder. ICECS (2002)
Philippe Coussy, Adel Baganne, Eric Martin
IP cores integration in DSP System-on-chip designs. EUSIPCO (2002)
Philippe Coussy, Adel Baganne, Eric Martin
A design methodology for IP integration. ISCAS (4) (2002)
Adel Baganne, Jean Luc Philippe, Eric Martin
A Co-Design Methodology for Telecommunication Systems: A Case Study of an Acoustic Echo Canceller. J. VLSI Signal Process. 22 (1) (1999)
S. Gailhard, Nathalie Julien, Adel Baganne, Eric Martin
Low Power Design of an Acoustic Echo Canceller Gmdf a Algorithm on Dedicated VLSI Architectures. Great Lakes Symposium on VLSI (1999)
Adel Baganne, Jean Luc Philippe, Eric Martin
Hardware interface design for real time embedded systems. Great Lakes Symposium on VLSI (1997)