Structural Fault Based Specification Reduction for Testing Analog Circuits.

Soon-Jyh Chang Chung-Len Lee Jwu E. Chen

Published in: J. Electron. Test. (2002)

Keyphrases

analog circuits
fault diagnosis
fault detection
test case generation
neural network
expert systems
digital circuits
wavelet packet transform
formal verification
fault model
test cases
structural information
high level
fuzzy logic
code generation
dynamic systems
query language
machine learning