as gate dielectric for sub-100nm CMOS and DRAM technology.
V. CapodieciF. WiestT. SulimaJ. SchulzeI. EiselePublished in: Microelectron. Reliab. (2005)
Keyphrases
- cmos technology
- low voltage
- metal oxide semiconductor
- low power
- nm technology
- embedded dram
- power consumption
- silicon on insulator
- leakage current
- parallel processing
- gate insulator
- power dissipation
- image sensor
- low cost
- gate dielectrics
- high speed
- integrated circuit
- case study
- power line
- high density
- random access memory
- cmos image sensor
- dynamic random access memory