An all-digital Read Stability and Write Margin characterization scheme for CMOS 6T SRAM array.
Yi-Wei LinMing-Chien TsaiHao-I YangGeng-Cing LinShao-Cheng WangChing-Te ChuangShyh-Jye JouWei HwangNan-Chun LienKuen-Di LeeWei-Chiang ShihPublished in: VLSI-DAT (2012)
Keyphrases
- random access memory
- power consumption
- low power
- circuit design
- design considerations
- low voltage
- read write
- image sensor
- charge coupled device
- control system
- focal plane
- digital content
- high speed
- low cost
- data transmission
- infrared
- disk drives
- hard disk
- mixed signal
- cmos image sensor
- data structure
- analog to digital converter