FPGA test time reduction through a novel interconnect testing scheme.
Stuart McCrackenZeljko ZilicPublished in: FPGA (2002)
Keyphrases
- high speed
- test cases
- test data
- software testing
- integration testing
- test generation
- real time
- hardware software co design
- test data generation
- regression testing
- test suite
- test sequences
- low cost
- parallel architecture
- signal processing
- field programmable gate array
- statistical tests
- test case generation
- model based testing
- hardware implementation
- fpga implementation
- data acquisition