Login / Signup
CMOS scaling beyond the 100-nm node with silicon-dioxide-based gate dielectrics.
Ernest Y. Wu
Edward J. Nowak
Alex Vayshenker
Wing L. Lai
David L. Harmon
Published in:
IBM J. Res. Dev. (2002)
Keyphrases
</>
gate dielectrics
electrical properties
leakage current
silicon dioxide
silicon nitride
si sio
low cost
tree structure
graph structure
high temperature
metal oxide semiconductor
neural network
social networks
decision trees
high speed