In-memory area-efficient signal streaming processor design for binary neural networks.
Haruyoshi YonekawaShimpei SatoHiroki NakaharaKota AndoKodai UeyoshiKazutoshi HiroseKentaro OrimoShinya Takamaeda-YamazakiMasayuki IkebeTetsuya AsaiMasato MotomuraPublished in: MWSCAS (2017)