Over-the-top Si Interposer Embedding Backside Buried Metal PDN to Reduce Power Supply Impedance of Large Scale Digital ICs.
Takuji MikiMakoto NagataAkihiro TsukiokaNoriyuki MiuraTakaaki OkidonoYuuki AragaNaoya WatanabeHaruo ShimamotoKatsuya KikuchiPublished in: 3DIC (2019)