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An 8-bit 56GS/s 64x Time-Interleaved ADC with Bootstrapped Sampler and Class-AB Buffer in 4nm CMOS.

Serdar S. YonarPier Andrea FranceseMatthias BrändliMarcel A. KosselThomas MorfJonathan E. ProeselSergey V. RylovHerschel A. AinspanMartin CochetZeynep Toprak DenizTimothy O. DicksonTroy J. BeukemaChristian W. BaksMichael P. BeakesJohn F. BulzacchelliYoung-Ho ChoiByoung-Joo YooHyoungbae AhnDong-Hyuk LimGunil KangSang-Hune ParkMounir MeghelliHyo-Gyuem RhewDaniel J. FriedmanMichael ChoiMehmet SoyuerJongshin Shin
Published in: VLSI Technology and Circuits (2022)
Keyphrases
  • analog to digital converter
  • high speed
  • nm technology
  • monte carlo
  • low cost
  • low power
  • cmos technology
  • visual tracking
  • virtual memory