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Identifying invalid states for sequential circuit test generation.
Hsing-Chung Liang
Chung-Len Lee
Jwu E. Chen
Published in:
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (1997)
Keyphrases
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test generation
test cases
symbolic execution
design automation
test sequences
high speed
static analysis
quality assurance
circuit design
mutation testing
image processing
code coverage
information systems
software testing
quality control
visual information
training data
test data generation
e learning