Extreme-voltage stress vector generation of analog CMOS ICs for gate-oxide reliability enhancement.
Mohammad Athar KhalilChin-Long WeyPublished in: ITC (2001)
Keyphrases
- gate dielectrics
- electrical properties
- leakage current
- low voltage
- field effect transistors
- si sio
- silicon dioxide
- steady state
- mixed signal
- image enhancement
- high density
- analog vlsi
- circuit design
- mathematical analysis
- design considerations
- room temperature
- vector space
- real time
- image processing
- power line
- signal processing
- feature vectors
- power supply
- cmos image sensor
- parallel processing
- power system