Yue-Tsang Chen

Publication Activity (10 Years)

Years Active: 1996-2001
Publications (10 Years): 0

Publications

Chauchin Su, Yue-Tsang Chen, Shyh-Jye Jou
Intrinsic response for analog module testing using an analog testability bus. ACM Trans. Design Autom. Electr. Syst. 6 (2) (2001)
Yue-Tsang Chen, Chauchin Su
Test Waveform Shaping in Mixed Signal Test Bus by Pre-Equalization. VTS (2001)
Chauchin Su, Yue-Tsang Chen, Shenshung Chiang
Impulse Response Fault Model and Fault Extraction for Functional Level Analog Circuit Diagnosis. J. Inf. Sci. Eng. 16 (5) (2000)
Chauchin Su, Yue-Tsang Chen, Mu-Jeng Huang, Gen-Nan Chen, Chung-Len Lee
All Digital Built-in Delay and Crosstalk Measurement for On-Chip Buses. DATE (2000)
Chauchin Su, Yue-Tsang Chen
Crosstalk Effect Removal for Analog Measurement in Analog Test Bus. VTS (2000)
Chauchin Su, Yue-Tsang Chen
Intrinsic response extraction for the removal of the parasiticeffects in analog test buses. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19 (4) (2000)
Chauchin Su, Yue-Tsang Chen, Chung-Len Lee
Analog Metrology and Stimulus Selection in a Noisy Environment. Asian Test Symposium (1999)
Chauchin Su, Shung-Won Jeng, Yue-Tsang Chen
Boundary scan BIST methodology for reconfigurable systems. ITC (1998)
Yue-Tsang Chen, Chauchin Su
Analog Module Metrology Using MNABST-1 P1149.4 Test Chip. Asian Test Symposium (1998)
Chauchin Su, Yue-Tsang Chen, Shyh-Jye Jou
Parasitic Effect Removal for Analog Measurement in P1149.4 Environment. ITC (1997)
Chauchin Su, Yi-Ren Cheng, Yue-Tsang Chen, Shing Tenchen
Analog signal metrology for mixed signal ICs. Asian Test Symposium (1997)
Chauchin Su, Yue-Tsang Chen, Shyh-Jye Jou, Yuan-Tzu Ting
Metrology for analog module testing using analog testability bus. ICCAD (1996)