Yosi Ben-Asher

ORCID

Publication Activity (10 Years)

Years Active: 1984-2023
Publications (10 Years): 18

Top Venues

MCSoC

IPDPS Workshops

ACM Trans. Archit. Code Optim.

SAMOS

Publications

Yosi Ben-Asher, Ibrahim Qashqoush
Using Multiple Clocks in Highlevel Synthesis to overcome unbalanced clock cycles. MCSoC (2023)
Gadi Haber, Shachaf Altman, Yosi Ben-Asher, Cfir Aguston
OCA - Code Advisory Tool for OpenMP Parallelization of Sequential Code. MCSoC (2023)
Jeryes Danial, Yosi Ben-Asher
ZigZag Algorithm: Scanning an Unknown Maze by an Autonomous Drone. IRC (2022)
Yosi Ben-Asher, Esti Stein, Vladislav Tartakovsky
FPGA Realization of the Reconfigurable Mesh Counting Algorithm. J. Circuits Syst. Comput. 30 (9) (2021)
Jeryes Danial, Yosi Ben-Asher, Dan Feldman
Resolving battery status and customer matching to create 24/7 drones based advertisement system. IRC (2021)
Ahmad Yasin, Jawad Haj-Yahya, Yosi Ben-Asher, Avi Mendelson
A Metric-Guided Method for Discovering Impactful Features and Architectural Insights for Skylake-Based Processors. ACM Trans. Archit. Code Optim. 16 (4) (2020)
Ahmad Yasin, Avi Mendelson, Yosi Ben-Asher
Tuning Performance via Metrics with Expectations. IEEE Comput. Archit. Lett. 18 (2) (2019)
Yosi Ben-Asher, Esti Stein
Evaluation of Circuits on the Reconfigurable Mesh. IPDPS Workshops (2019)
Yosi Ben-Asher, Vladislav Tartakovsky
Efficient Conversion of Boolean Circuits to Nondeterministic Branching Programs. IPDPS Workshops (2019)
Yosi Ben-Asher, Vladislav Tartakovsky, Katrina Portman, Orr Zilberman, Avishi Hadar
An FPGA Scalable Parallel Viterbi Decoder. MCSoC (2018)
Ahmad Yasin, Yosi Ben-Asher
A first-order approximation of microarchitecture energy-efficiency. SAMOS (2018)
Jawad Haj-Yihia, Yosi Ben-Asher
Software Static Energy Modeling for Modern Processors. Int. J. Parallel Program. 46 (2) (2018)
Yosi Ben-Asher, Irina Lipov
Unifying Wire and Time Scheduling for Highlevel Synthesis. MCSoC (2018)
Yosi Ben-Asher, Irina Lipov, Vladislav Tartakovsky, Dror Tiv
Generating ASIPs with Reduced Number of Connections to the Register-File. Int. J. Parallel Program. 45 (6) (2017)
Yosi Ben-Asher, Gadi Haber, Esti Stein
A Study of Conflicting Pairs of Compiler Optimizations. MCSoC (2017)
Yosi Ben-Asher, Esti Stein, Ramachandran Vaidyanathan
Combining Boolean Gates and Branching Programs in One Model can Lead to Faster Circuits. IPDPS Workshops (2017)
Jawad Haj-Yihia, Ahmad Yasin, Yosi Ben-Asher, Avi Mendelson
Fine-Grain Power Breakdown of Modern Out-of-Order Cores and Its Implications on Skylake-Based Systems. ACM Trans. Archit. Code Optim. 13 (4) (2016)
Yosi Ben-Asher, Esti Stein
Adaptive Booth Algorithm for Three-integers Multiplication for Reconfigurable Mesh. J. Interconnect. Networks 16 (1) (2016)
Yosi Ben-Asher, Irina Lipov, Vladislav Tartakovsky, Dror Tiv
Generating ASIPs with reduced number of connections to the register-file. SAMOS (2015)
Yosi Ben-Asher, Yousef Shajrawi, Y. Gendel, Gadi Haber, Oren Segal
A study of manycore shared memory architecture as a way to build SOC applications. SpringSim (HPS) (2015)
Cfir Aguston, Yosi Ben-Asher, Gadi Haber
Parallelization Hints via Code Skeletonization. IEEE Trans. Parallel Distributed Syst. 26 (11) (2015)
Gil Rapaport, Ayal Zaks, Yosi Ben-Asher
Streamlining Whole Function Vectorization in C Using Higher Order Vector Semantics. IPDPS Workshops (2015)
Jawad Haj-Yihia, Ahmad Yasin, Yosi Ben-Asher
DOEE: dynamic optimization framework for better energy efficiency. SpringSim (HPS) (2015)
Esti Stein, Yosi Ben-Asher
Adaptive Booth Algorithm for Three-Integers Multiplication for Reconfigurable Mesh. IPDPS Workshops (2014)
Jawad Haj-Yihia, Yosi Ben-Asher, Efraim Rotem, Ahmad Yasin, Ran Ginosar
Compiler-Directed Power Management for Superscalars. ACM Trans. Archit. Code Optim. 11 (4) (2014)
Yosi Ben-Asher, Irina Lipov, Vladislav Tartakovsky, Dror Tiv
Using Multi-op Instructions as a Way to Generate ASIPs with Optimized Pipeline Structure. FCCM (2014)
Yosi Ben-Asher, Jacob Gendel, Gadi Haber, Oren Segal, Yousef Shajrawi
1K manycore FPGA shared memory architecture for SOC (abstract only). FPGA (2014)
Ahmad Yasin, Yosi Ben-Asher, Avi Mendelson
Deep-dive analysis of the data analytics workload in CloudSuite. IISWC (2014)
Cfir Aguston, Yosi Ben-Asher, Gadi Haber
Parallelization hints via code skeletonization. PPOPP (2014)
Nadav Rotem, Yosi Ben-Asher
Block Unification IF-conversion for High Performance Architectures. IEEE Comput. Archit. Lett. 13 (1) (2014)
Yosi Ben-Asher, Ron Meldiner, Nadav Rotem
Optimizing Wait States in the Synthesis of Memory References with Unpredictable Latencies. ACM Trans. Reconfigurable Technol. Syst. 6 (4) (2013)
Yosi Ben-Asher, Nadav Rotem
Hybrid type legalization for a sparse SIMD instruction set. ACM Trans. Archit. Code Optim. 10 (3) (2013)
Yosi Ben-Asher, Nadav Rotem
Using memory profile analysis for automatic synthesis of pointers code. ACM Trans. Embed. Comput. Syst. 12 (3) (2013)
Yosi Ben-Asher, Nadav Rotem
The benefits of using variable-length pipelined operations in high-level synthesis. ACM Trans. Embed. Comput. Syst. 13 (3) (2013)
Yosi Ben-Asher, Eldar Fisher, Gadi Haber, Vladislav Tartakovsky
Fast Evaluation of Boolean Circuits Based on Two-Players Game and Optical Connectivity Circuits. ICPP (2012)
Yosi Ben-Asher, Tomer Gal, Gadi Haber, Marcel Zalmanovici
Refactoring techniques for aggressive object inlining in Java applications. Autom. Softw. Eng. 19 (1) (2012)
Fadi Abboud, Yosi Ben-Asher, Yousef Shajrawi, Esti Stein
Combining Height Reduction and Scheduling for VLIW Machines Enhanced with Three-Argument Arithmetic Operations. Int. J. Parallel Program. 40 (5) (2012)
Yosi Ben-Asher, Sharoni Feldman, Moran Feldman
Dynamic Multipath Allocation in Ad Hoc Networks. Comput. J. 54 (2) (2011)
Yosi Ben-Asher, Ron Meldiner, Nadav Rotem
Optimizing wait-states in the synthesis of memory references with unpredictable latencies. ICSAMOS (2011)
Nadav Rotem, Yosi Ben-Asher
Combining static and dynamic array detection for binary synthesis with multiple memory ports. Des. Autom. Embed. Syst. 15 (1) (2011)
Yosi Ben-Asher, Mohsen Abu Saleh
Auctions by price and distance via cellular phones. Electron. Commer. Res. Appl. 10 (2) (2011)
Yosi Ben-Asher, Nadav Rotem, Eddie Shochat
Finding the best compromise in compiling compound loops to Verilog. J. Syst. Archit. 56 (9) (2010)
Yosi Ben-Asher, Dimitry Giver, Gadi Haber, Gil Kulish
HparC: a mixed nested shared memory and message passing programming style intended for grid. SYSTOR (2010)
Yosi Ben-Asher, Sharoni Feldman, Moran Feldman, Pini Gurfil
Scalability Issues in Ad-Hoc Networks: Metrical Routing Versus Table-Driven Routing. Wirel. Pers. Commun. 52 (3) (2010)
Yosi Ben-Asher, Danny Meisler, Nadav Rotem
Reducing Memory Constraints in Modulo Scheduling Synthesis for FPGAs. ACM Trans. Reconfigurable Technol. Syst. 3 (3) (2010)
Yosi Ben-Asher, Jawad Haj-Yihia
Computing the correct Increment of Induction Pointers with application to loop unrolling. J. Syst. Archit. 56 (12) (2010)
Yosi Ben-Asher, Nadav Rotem
Automatic memory partitioning: increasing memory parallelism via data structure partitioning. CODES+ISSS (2010)
Yosi Ben-Asher, Nadav Rotem
Binary Synthesis with multiple memory banks targeting array references. FPL (2009)
Yosi Ben-Asher, Nadav Rotem
The effect of unrolling and inlining for Python bytecode optimizations. SYSTOR (2009)
Yosi Ben-Asher, Moshe Yuda
Source level merging of independent programs. J. Parallel Distributed Comput. 69 (6) (2009)
Yosi Ben-Asher, Esti Stein
Extending Booth algorithm to multiplications of three numbers on FPGAs. FPT (2008)
Yosi Ben-Asher, Sharoni Feldman, Pini Gurfil, Moran Feldman
Communication. IEEE Trans. Control. Syst. Technol. 16 (3) (2008)
Yosi Ben-Asher, Nadav Rotem
Synthesis for variable pipelined function units. SoC (2008)
Yosi Ben-Asher, Omer Boehm, Daniel Citron, Gadi Haber, Moshe Klausner, Roy Levin, Yousef Shajrawi
Aggressive Function Inlining: Preventing Loop Blockings in the Instruction Cache. HiPEAC (2008)
Yosi Ben-Asher, Eddie Shochat
Finding the Best Compromise in Compiling Compound Loops to Verilog. ISVLSI (2008)
Yosi Ben-Asher, Sharoni Feldman, Pini Gurfil, Moran Feldman
Hierarchical Task Assignment and Communication Algorithms for Unmanned Aerial Vehicle Flocks. J. Aerosp. Comput. Inf. Commun. 5 (8) (2008)
Yosi Ben-Asher, Shlomo Berkovsky, Paolo Busetta, Yaniv Eytani, Sadek Jbara, Tsvi Kuflik
Adaptive Retrieval of Semi-structured Data. AH (2008)
Yosi Ben-Asher, Moshe Yuda
Source Level Merging of Independent Programs. PACT (2007)
Yosi Ben-Asher, Moran Feldman, Sharoni Feldman, Pini Gurfil
IFAS: Interactive flexible ad hoc simulator. Simul. Model. Pract. Theory 15 (7) (2007)
Yosi Ben-Asher, Danny Meisler
Towards a Source Level Compiler: Source Level Modulo Scheduling. Program Analysis and Compilation (2006)
Yosi Ben-Asher, Shlomo Berkovsky
Semantic Data Management in Peer-to-Peer E-Commerce Applications. J. Data Semant. (2006)
Yosi Ben-Asher, Yaniv Eytani, Eitan Farchi, Shmuel Ur
Producing scheduling that causes concurrent programs to fail. PADTAD (2006)
Yosi Ben-Asher, Moran Feldman, Sharoni Feldman
Ad-Hoc Routing Using Virtual Coordinates Based on Rooted Trees. SUTC (1) (2006)
Yosi Ben-Asher, Moran Feldman, Sharoni Feldman, Pini Gurfil
Metrical Routing using Ad-Hoc Networks in Hierarchical Environment. ITRE (2006)
Yosi Ben-Asher, Eitan Farchi, Yaniv Eytani, Shmuel Ur
Noise Makers Need to Know Where to be Silent - Producing Schedules That Find Bugs. ISoLA (2006)
Yosi Ben-Asher, Danny Meisler
Towards a Source Level Compiler: Source Level Modulo Scheduling. ICPP Workshops (2006)
Yosi Ben-Asher, Shlomo Berkovsky, Yaniv Eytani
Management of unspecified semi-structured data in multi-agent environment. SAC (2006)
Yosi Ben-Asher, Daniel Citron, Gadi Haber
Overlapping memory operations with circuit evaluation in reconfigurable computing. Int. J. Embed. Syst. 2 (1/2) (2006)
Yosi Ben-Asher, Igor Breger, Eitan Farchi, Ilia Gordon
Optimal Algorithmic Debugging and Reduced Coverage Using Search in Structured Domains. Haifa Verification Conference (2005)
Yosi Ben-Asher, Eitan Farchi
Compact Representations of Search in Complex Domains. IGTR 7 (1) (2005)
Yosi Ben-Asher, Shlomo Berkovsky, Eduard Gelzin, Ariel Tammam, Miri Vilkhov
Using J2EE/NET Clusters for Parallel Computations of Join Queries in Distributed Databases. J. Digit. Inf. Manag. 3 (2) (2005)
Yosi Ben-Asher, Eitan Farchi
Compact Representations of Search in Complex Domains. IGTR 7 (2) (2005)
Yosi Ben-Asher, Gadi Haber
Efficient parallel solutions of linear algebraic circuits. J. Parallel Distributed Comput. 64 (1) (2004)
Yosi Ben-Asher, Shlomo Berkovsky, Ariel Tammam, Edi Shmueli
Using a J2EE Cluster for Parallel Computation of Join Queries in Distributed Databases. ISPDC/HeteroPar (2004)
Yosi Ben-Asher, Daniel Citron, Gadi Haber
Overlapping Memory Operations with Circuit Evaluation in Reconfigurable Computing. IPDPS (2004)
Yosi Ben-Asher, Eitan Farchi, Yaniv Eytani
Heuristics for Finding Concurrent Bug. IPDPS (2003)
Yosi Ben-Asher
The parallel client-server paradigm. Parallel Comput. 28 (3) (2002)
Yosi Ben-Asher, Esti Stein
Basic Algorithms for the Asynchronous Reconfigurable Mesh. VLSI Design 2002 (1) (2002)
Yosi Ben-Asher, Esti Stein
Basic Algorithms for the Asynchronous Reconfigurable Mes. IPDPS (2002)
Adnan Agbaria, Yosi Ben-Asher, Ilan Newman
Communication - Processor Tradeoffs in a Limited Resources PRAM. Algorithmica 34 (3) (2002)
Yosi Ben-Asher
Distributed Routing of Ads and Bids through Random Walks in the IDOS System. J. Parallel Distributed Comput. 61 (10) (2001)
Yosi Ben-Asher, Gadi Haber
Parallel Solutions of Simple Indexed Recurrence Equations. IEEE Trans. Parallel Distributed Syst. 12 (1) (2001)
Yosi Ben-Asher, Dimitry Podvolny
Y-Invalidate: A New Protocol for Implementing Weak Consistency in DSM Systems. Int. J. Parallel Program. 29 (6) (2001)
Yosi Ben-Asher, Esti Stein
Basic Results in Automatic Transformations of Shared Memory Parallel Programs into Sequential Programs. J. Supercomput. 17 (2) (2000)
Yosi Ben-Asher, Assaf Schuster
Single Step Undirected Reconfigurable Networks. VLSI Design 1999 (1) (1999)
Yosi Ben-Asher, Eitan Farchi, Ilan Newman
Optimal Search in Trees. SIAM J. Comput. 28 (6) (1999)
Adnan Agbaria, Yosi Ben-Asher, Ilan Newman
Communication-Processor Tradeoffs in Limited Resources PRAM. SPAA (1999)
Yosi Ben-Asher, Gadi Haber
Efficient Parallel Solutions of Linear Algebraic Circuits. SPAA (1999)
Yosi Ben-Asher, Gadi Haber
Parallel Solutions of Simple Index Recurrence Equations. Euro-Par (1998)
Yosi Ben-Asher, Ilan Newman
Geometric Approach for Optimal Routing on a Mesh with Buses. J. Comput. Syst. Sci. 54 (3) (1997)
Yosi Ben-Asher, Esti Stein
Basic Results in Automatic Transformations of Shared Memory Parallel Programs into Sequential Programs. ASIAN (1997)
Yosi Ben-Asher, Eitan Farchi, Ilan Newman
Optimal Search in Trees: Extended Abstract + Appendix. SODA (1997)
Yosi Ben-Asher
Optical Routing in Meshes Using the Duplication Model. J. Parallel Distributed Comput. 41 (1) (1997)
Yosi Ben-Asher, Assaf Schuster
Single step undirected reconfigurable networks. HiPC (1997)
Gadi Haber, Yosi Ben-Asher
Parallel Solutions of Indexed Recurrence Equations. IPPS (1997)
Yosi Ben-Asher, Ilan Newman
Optimal Search in Trees Electron. Colloquium Comput. Complex. 3 (44) (1996)
Yosi Ben-Asher, Ilan Newman
Geometric Approach for Optimal Routing on Mesh with Buses Electron. Colloquium Comput. Complex. 3 (53) (1996)
Yosi Ben-Asher, Gadi Haber
On the usage of simulators to detect inefficiency of parallel programs caused by "bad" schedulings: The Simparc approach. J. Syst. Softw. 33 (3) (1996)
Yosi Ben-Asher, Assaf Schuster
Low Crosstalk Address Encodings for Optical Message Switching Systems. Parallel Process. Lett. 6 (1) (1996)
Yosi Ben-Asher, Assaf Schuster
Time-Size Tradeoffs for Reconfigurable Meshes. Parallel Process. Lett. 6 (2) (1996)

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Publication Activity (10 Years)

Top Topics

Top Venues

Yosi Ben-Asher