Vladislav Tartakovsky

Publication Activity (10 Years)

Years Active: 2012-2021
Publications (10 Years): 5

Top Topics

Logic Synthesis

Delay Insensitive

Lateral Inhibition

Automatically Generate

Top Venues

Publications

Yosi Ben-Asher, Esti Stein, Vladislav Tartakovsky
FPGA Realization of the Reconfigurable Mesh Counting Algorithm. J. Circuits Syst. Comput. 30 (9) (2021)
Yosi Ben-Asher, Vladislav Tartakovsky
Efficient Conversion of Boolean Circuits to Nondeterministic Branching Programs. IPDPS Workshops (2019)
Yosi Ben-Asher, Vladislav Tartakovsky, Katrina Portman, Orr Zilberman, Avishi Hadar
An FPGA Scalable Parallel Viterbi Decoder. MCSoC (2018)
Yosi Ben-Asher, Irina Lipov, Vladislav Tartakovsky, Dror Tiv
Generating ASIPs with Reduced Number of Connections to the Register-File. Int. J. Parallel Program. 45 (6) (2017)
Vladislav Tartakovsky
Student Research Poster: Compiling Boolean Circuits to Non-deterministic Branching Programs to be Implemented by Light Switching Circuits. PACT (2016)
Yosi Ben-Asher, Irina Lipov, Vladislav Tartakovsky, Dror Tiv
Generating ASIPs with reduced number of connections to the register-file. SAMOS (2015)
Yosi Ben-Asher, Irina Lipov, Vladislav Tartakovsky, Dror Tiv
Using Multi-op Instructions as a Way to Generate ASIPs with Optimized Pipeline Structure. FCCM (2014)
Yosi Ben-Asher, Eldar Fisher, Gadi Haber, Vladislav Tartakovsky
Fast Evaluation of Boolean Circuits Based on Two-Players Game and Optical Connectivity Circuits. ICPP (2012)