Yoshiro Riho

Publication Activity (10 Years)

Years Active: 2006-2014
Publications (10 Years): 0

Top Topics

Power Management

Dc Dc Converter

Power Consumption

Top Venues

ACM Great Lakes Symposium on VLSI

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Yoshiro Riho, Kazuo Nakazato
Partial Access Mode: New Method for Reducing Power Consumption of Dynamic Random Access Memory. IEEE Trans. Very Large Scale Integr. Syst. 22 (7) (2014)
Yoshiro Riho, Kazuo Nakazato
A new extension method of retention time for memory cell on dynamic random access memory. Integr. 47 (3) (2014)
Yoshiro Riho, Kazuo Nakazato
A new DRAM architecture and its control method for the system power consumption. ACM Great Lakes Symposium on VLSI (2014)
Yoshiro Riho, Kazuo Nakazato
A new extension method of retention time for memory cell on dynamic random access memory. ACM Great Lakes Symposium on VLSI (2013)
Hiroki Fujisawa, Shuichi Kubouchi, Koji Kuroki, Naohisa Nishioka, Yoshiro Riho, Hiromasa Noda, Isamu Fujii, Hideyuki Yoko, Ryuuji Takishita, Takahiro Ito, Hitoshi Tanaka, Masayuki Nakamura
An 8.1-ns Column-Access 1.6-Gb/s/pin DDR3 SDRAM With an 8: 4 Multiplexed Data-Transfer Scheme. IEEE J. Solid State Circuits 42 (1) (2007)
Hiroki Fujisawa, Shuichi Kubouchi, Koji Kuroki, Naohisa Nishioka, Yoshiro Riho, Hiromasa Noda, Isamu Fujii, Hideyuki Yoko, Ryuuji Takishita, Takahiro Ito, Hitoshi Tanaka, Masayuki Nakamura
An 8.4ns Column-Access 1.3Gb/s/pin DDR3 SDRAM with an 8: 4 Multiplexed Data-Transfer Scheme. ISSCC (2006)