An 8.1-ns Column-Access 1.6-Gb/s/pin DDR3 SDRAM With an 8: 4 Multiplexed Data-Transfer Scheme.
Hiroki FujisawaShuichi KubouchiKoji KurokiNaohisa NishiokaYoshiro RihoHiromasa NodaIsamu FujiiHideyuki YokoRyuuji TakishitaTakahiro ItoHitoshi TanakaMasayuki NakamuraPublished in: IEEE J. Solid State Circuits (2007)