An 8.4ns Column-Access 1.3Gb/s/pin DDR3 SDRAM with an 8: 4 Multiplexed Data-Transfer Scheme.
Hiroki FujisawaShuichi KubouchiKoji KurokiNaohisa NishiokaYoshiro RihoHiromasa NodaIsamu FujiiHideyuki YokoRyuuji TakishitaTakahiro ItoHitoshi TanakaMasayuki NakamuraPublished in: ISSCC (2006)