Wim Vanderbauwhede

ORCID

Publication Activity (10 Years)

Years Active: 2001-2023
Publications (10 Years): 49

Top Venues

CoRR

IPDPS Workshops

PARCO

Dagstuhl Artifacts Ser.

Publications

Wim Vanderbauwhede
Frugal Computing - On the need for low-carbon and sustainable computing and the path towards zero-carbon computing. CoRR (2023)
Jan de Muijnck-Hughes, Wim Vanderbauwhede
Wiring Circuits Is Easy as {0, 1, ω}, or Is It... ECOOP (2023)
Robert Szafarczyk, Syed Waqar Nabi, Wim Vanderbauwhede
A High-Frequency Load-Store Queue with Speculative Allocations for High-Level Synthesis. ICFPT (2023)
Robert Szafarczyk, Syed Waqar Nabi, Wim Vanderbauwhede
A High-Frequency Load-Store Queue with Speculative Allocations for High-Level Synthesis. CoRR (2023)
Jan de Muijnck-Hughes, Wim Vanderbauwhede
Wiring Circuits Is Easy as {0, 1, ω}, or Is It... (Artifact). Dagstuhl Artifacts Ser. 9 (2) (2023)
Youssef Moawad, Wim Vanderbauwhede, René Steijl
Quantum Circuit-Width Reduction through Parameterisation and Specialisation. Algorithms 16 (5) (2023)
Robert Szafarczyk, Syed Waqar Nabi, Wim Vanderbauwhede
Dynamically Scheduled Memory Operations in Static High-Level Synthesis. FCCM (2023)
Robert Szafarczyk, Syed Waqar Nabi, Wim Vanderbauwhede
Compiler Discovered Dynamic Scheduling of Irregular Code in High-Level Synthesis. FPL (2023)
Robert Szafarczyk, Syed Waqar Nabi, Wim Vanderbauwhede
Compiler Discovered Dynamic Scheduling of Irregular Code in High-Level Synthesis. CoRR (2023)
Wim Vanderbauwhede
Making legacy Fortran code type safe through automated program transformation. J. Supercomput. 78 (2) (2022)
Robert Szafarczyk, Syed Waqar Nabi, Wim Vanderbauwhede
Reducing FPGA Memory Footprint of Stencil Codes through Automatic Extraction of Memory Patterns. FPL (2022)
Youssef Moawad, Wim Vanderbauwhede, René Steijl
Transformations for accelerator-based quantum circuit simulation in Haskell. CoRR (2022)
Muhammad Farhan Khalid, Kanzal Iman, Amna Ghafoor, Mujtaba Saboor, Ahsan Ali, Urwa Muaz, Abdul Rehman Basharat, Taha Tahir, Muhammad Abubakar, Momina Amer Akhter, Waqar Nabi, Wim Vanderbauwhede, Fayyaz Ahmad, Bilal Wajid, Safee Ullah Chaudhary
PERCEPTRON: an open-source GPU-accelerated proteoform identification pipeline for top-down proteomics. Nucleic Acids Res. 49 (Webserver-Issue) (2021)
Jan de Muijnck-Hughes, Edwin C. Brady, Wim Vanderbauwhede
A Framework for Resource Dependent EDSLs in a Dependently Typed Language (Artifact). Dagstuhl Artifacts Ser. 6 (2) (2020)
Jan de Muijnck-Hughes, Edwin C. Brady, Wim Vanderbauwhede
A Framework for Resource Dependent EDSLs in a Dependently Typed Language (Pearl). ECOOP (2020)
Wim Vanderbauwhede, Sven-Bodo Scholz, Martin Margala
FPGAs for Domain Experts. Int. J. Reconfigurable Comput. 2020 (2020)
Cristian Urlea, Wim Vanderbauwhede, Syed Waqar Nabi
Efficient FPGA Cost-Performance Space Exploration using Type-Driven Program Transformations. ReConFig (2019)
Syed Waqar Nabi, Wim Vanderbauwhede
Automatic Pipelining and Vectorization of Scientific Code for FPGAs. Int. J. Reconfigurable Comput. 2019 (2019)
Syed Waqar Nabi, Wim Vanderbauwhede
Smart-Cache: Optimising Memory Accesses for Arbitrary Boundaries and Stencils on FPGAs. IPDPS Workshops (2019)
Jan de Muijnck-Hughes, Edwin C. Brady, Wim Vanderbauwhede
Value-Dependent Session Design in a Dependently Typed Language. PLACES@ETAPS (2019)
Jan de Muijnck-Hughes, Wim Vanderbauwhede
A Typing Discipline for Hardware Interfaces. ECOOP (2019)
Wim Vanderbauwhede, Syed Waqar Nabi
Towards Automatic Transformation of Legacy Scientific Code into OpenCL for Optimal Performance on FPGAs. CoRR (2019)
Jan de Muijnck-Hughes, Wim Vanderbauwhede
A Typing Discipline for Hardware Interfaces (Artifact). Dagstuhl Artifacts Ser. 5 (2) (2019)
Wim Vanderbauwhede, Syed Waqar Nabi, Cristian Urlea
Type-Driven Automated Program Transformations and Cost Modelling for Optimising Streaming Programs on FPGAs. Int. J. Parallel Program. 47 (1) (2019)
Syed Waqar Nabi, Wim Vanderbauwhede
FPGA design space exploration for scientific HPC applications using a fast and accurate cost model based on roofline analysis. J. Parallel Distributed Comput. 133 (2019)
Wim Vanderbauwhede
The Glasgow Fortran Source-to-Source Compiler. J. Open Source Softw. 3 (32) (2018)
Syed Waqar Nabi, Wim Vanderbauwhede
MP-STREAM: A Memory Performance Benchmark for Design Space Exploration on Heterogeneous HPC Devices. IPDPS Workshops (2018)
Wim Vanderbauwhede, Gavin Davidson
Domain-Specific Acceleration and Auto-Parallelization of Legacy Scientific Code in FORTRAN 77 using Source-to-Source Compilation. CoRR (2017)
Ashkan Tousimojarad, Wim Vanderbauwhede, W. Paul Cockshott
2D Image Convolution using Three Parallel Programming Models on the Xeon Phi. CoRR (2017)
Wim Vanderbauwhede, Tetsuya Takemi
An analysis of the feasibility and benefits of GPU/multicore acceleration of the Weather Research and Forecasting model. Concurr. Comput. Pract. Exp. 28 (7) (2016)
Nasibeh Nasiri, Philip Colangelo, Oren Segal, Martin Margala, Wim Vanderbauwhede
Document classification systems in heterogeneous computing environments. PATMOS (2016)
Sharifa Al Khanjari, Wim Vanderbauwhede
Evaluation of the Memory Communication Traffic in a Hierarchical Cache Model for Massively-Manycore Processors. PDP (2016)
Andreas Assmuth, Paul Cockshott, Jana Kipke, Karen Renaud, Lewis Mackenzie, Wim Vanderbauwhede, Matthias Söllner, Tilo Fischer, George R. S. Weir
Improving Resilience by Deploying Permuted Code onto Physically Unclonable Unique Processors. CCC (2016)
Syed Waqar Nabi, Wim Vanderbauwhede
A Fast and Accurate Cost Model for FPGA Design Space Exploration in HPC Applications. IPDPS Workshops (2016)
Ashkan Tousimojarad, Wim Vanderbauwhede
Number of Tasks, not Threads, is Key. PDP (2015)
Syed Waqar Nabi, Wim Vanderbauwhede
An Intermediate Language and Estimator for Automated Design Space Exploration on FPGAs. CoRR (2015)
Wim Vanderbauwhede, Tetsuya Takemi
Twinned buffering: A simple and highly effective scheme for parallelization of Successive Over-Relaxation on GPUs and other accelerators. HPCS (2015)
Syed Waqar Nabi, Wim Vanderbauwhede
Using type transformations to generate program variants for FPGA design space exploration. ReConFig (2015)
Ashkan Tousimojarad, Wim Vanderbauwhede
Steal Locally, Share Globally - A Strategy for Multiprogramming in the Manycore Era. Int. J. Parallel Program. 43 (5) (2015)
Syed Waqar Nabi, Saji N. Hameed, Wim Vanderbauwhede
A Reconfigurable Vector Instruction Processor for Accelerating a Convection Parametrization Model on FPGAs. CoRR (2015)
Nasibeh Nasiri, Oren Segal, Martin Margala, Wim Vanderbauwhede, Sai Rahul Chalamalasetti
High Level Programming of Document Classification Systems for Heterogeneous Environments using OpenCL (Abstract Only). FPGA (2015)
Omair Inam, Sharifa Al Khanjari, Wim Vanderbauwhede
Shortest Path Routing Algorithm for Hierarchical Interconnection Network-on-Chip. FNC/MobiSPC (2015)
Wim Vanderbauwhede
Model Coupling between the Weather Research and Forecasting Model and the DPRI Large Eddy Simulator for Urban Flows on GPU-accelerated Multicore Systems. CoRR (2015)
Wim Vanderbauwhede
Inferring Program Transformations from Type Transformations for Partitioning of Ordered Sets. CoRR (2015)
Ashkan Tousimojarad, Wim Vanderbauwhede
Efficient Parallel Linked List Processing. PARCO (2015)
Wim Vanderbauwhede, Syed Waqar Nabi
FPGAs as Components in Heterogeneous High-Performance Computing Systems: Raising the Abstraction Level. PARCO (2015)
Wim Vanderbauwhede, Sven-Bodo Scholz, Tetsuya Takemi
Putting Heterogeneous High-Performance Computing at the Fingertips of Domain Experts (NII Shonan Meeting 2015-18). NII Shonan Meet. Rep. 2015 (2015)
Kristian Thorin Hentschel, Wim Vanderbauwhede, Syed Waqar Nabi
FPGA Port of a Large Scientific Model from Legacy Code: The Emanuel Convection Scheme. PARCO (2015)
Sharifa Al Khanjari, Wim Vanderbauwhede
The Impact of Traffic Localisation on the Performance of NoCs for Very Large Manycore Systems. FNC/MobiSPC (2015)
Ashkan Tousimojarad, Wim Vanderbauwhede
An Efficient Thread Mapping Strategy for Multiprogramming on Manycore Processors. CoRR (2014)
Ashkan Tousimojarad, Wim Vanderbauwhede
Comparison of Three Popular Parallel Programming Models on the Intel Xeon Phi. Euro-Par Workshops (2) (2014)
Ashkan Tousimojarad, Wim Vanderbauwhede
A Parallel Task-based Approach to Linear Algebra. CoRR (2014)
Ashkan Tousimojarad, Wim Vanderbauwhede
A Parallel Task-Based Approach to Linear Algebra. ISPDC (2014)
Paul Harvey, Saji Hameed, Wim Vanderbauwhede
Accelerating Lagrangian particle dispersion in the atmosphere with OpenCL across multiple platforms. IWOCL (2014)
Oren Segal, Nasibeh Nasiri, Martin Margala, Wim Vanderbauwhede
High level programming of FPGAs for HPC and data centric applications. HPEC (2014)
Wim Vanderbauwhede
List-based Monadic Computations for Dynamically Typed Languages. Dyla@PLDI (2014)
Ashkan Tousimojarad, Wim Vanderbauwhede
Cache-aware Parallel Programming for Manycore Processors. CoRR (2014)
Sohan Purohit, Sai Rahul Chalamalasetti, Martin Margala, Wim Vanderbauwhede
Throughput/Resource-Efficient Reconfigurable Processor for Multimedia Applications. IEEE Trans. Very Large Scale Integr. Syst. 21 (7) (2013)
Sohan Purohit, Sai Rahul Chalamalasetti, Martin Margala, Wim Vanderbauwhede
Design and Evaluation of High-Performance Processing Elements for Reconfigurable Systems. IEEE Trans. Very Large Scale Integr. Syst. 21 (10) (2013)
Wim Vanderbauwhede, Tetsuya Takemi
An investigation into the feasibility and benefits of GPU/multicore acceleration of the weather research and forecasting model. HPCS (2013)
Wim Vanderbauwhede, Stefanie Lewis, David Ireland
Implementing data parallelisation in a Nested-Sampling Monte Carlo algorithm. HPCS (2013)
Ashkan Tousimojarad, Wim Vanderbauwhede
An Efficient Thread Mapping Strategy for Multiprogramming on Manycore Processors. PARCO (2013)
Wim Vanderbauwhede, Anton Frolov, Sai Rahul Chalamalasetti, Martin Margala
A hybrid CPU-FPGA system for high throughput (10Gb/s) streaming document classification. SIGARCH Comput. Archit. News 41 (5) (2013)
Wim Vanderbauwhede, Anton Frolov, Leif Azzopardi, Sai Rahul Chalamalasetti, Martin Margala
High throughput filtering using FPGA-acceleration. CIKM (2013)
Ashkan Tousimojarad, Wim Vanderbauwhede
The Glasgow Parallel Reduction Machine: Programming Shared-memory Many-core Systems using Parallel Task Composition. PLACES (2013)
Gordon Stewart, Wim Vanderbauwhede
Improving user experience of submitting jobs to HPC resources. HPCS (2012)
Wim Vanderbauwhede, Sai Rahul Chalamalasetti, Martin Margala
Throughput Analysis for a High-Performance FPGA-Accelerated Real-Time Search Application. Int. J. Reconfigurable Comput. 2012 (2012)
Faiz-ul Hassan, Wim Vanderbauwhede, Fernando Rodríguez Salazar
Impact of Random Dopant Fluctuations on the Timing Characteristics of Flip-Flops. IEEE Trans. Very Large Scale Integr. Syst. 20 (1) (2012)
Sai Rahul Chalamalasetti, Martin Margala, Wim Vanderbauwhede, Mitch Wright, Parthasarathy Ranganathan
Evaluating FPGA-acceleration for real-time unstructured search. ISPASS (2012)
Wim Vanderbauwhede, Sai Rahul Chalamalasetti, Sohan Purohit, Martin Margala
A few lines of code, thousands of cores: High-level FPGA programming using vector processor networks. HPCS (2011)
Mahmoud Moadeli, Wim Vanderbauwhede
An analytical model of broadcast in QoS-aware wormhole-routed NoCs. J. Syst. Softw. 84 (1) (2011)
Leif Azzopardi, Wim Vanderbauwhede, Hideo Joho
Search system requirements of patent analysts. SIGIR (2010)
Sai Rahul Chalamalasetti, Sohan Purohit, Martin Margala, Wim Vanderbauwhede
Radiation-Hardened Reconfigurable Array With Instruction Roll-Back. IEEE Embed. Syst. Lett. 2 (4) (2010)
Wim Vanderbauwhede, Syed Waqar Nabi
A high-level language for programming a NoC-based Dynamic Reconfiguration Infrastructure. DASIP (2010)
Faiz-ul Hassan, Wim Vanderbauwhede, Fernando Rodríguez Salazar
Performance Analysis of On-Chip Communication Structures under Device Variability. Int. J. Embed. Real Time Commun. Syst. 1 (4) (2010)
Hideo Joho, Leif Azzopardi, Wim Vanderbauwhede
A survey of patent users: an analysis of tasks, behavior, search functionality and system requirements. IIiX (2010)
Mahmoud Moadeli, Wim Vanderbauwhede
Communication modeling of multicast in all-port wormhole-routed NoCs. J. Syst. Softw. 83 (8) (2010)
Mahmoud Moadeli, Alireza Shahrabi, Wim Vanderbauwhede, Partha P. Maji
An analytical performance model for the Spidergon NoC with virtual channels. J. Syst. Archit. 56 (1) (2010)
Wim Vanderbauwhede, Martin Margala, Sai Rahul Chalamalasetti, Sohan Purohit
A C++-embedded Domain-Specific Language for programming the MORA soft processor array. ASAP (2010)
Mahmoud Moadeli, Partha P. Maji, Wim Vanderbauwhede
Quarc: A High-Efficiency Network on-Chip Architecture. AINA (2009)
Sai Rahul Chalamalasetti, Sohan Purohit, Martin Margala, Wim Vanderbauwhede
MORA - An Architecture and Programming Model for a Resource Efficient Coarse Grained Reconfigurable Processor. AHS (2009)
Sarah Omar Al-Humoud, Lewis M. Mackenzie, Wim Vanderbauwhede
Dynamic counter-based broadcast in MANETs. PM2HW2N@MSWiM (2009)
Mahmoud Moadeli, Wim Vanderbauwhede
A performance model of multicast communication in wormhole-routed networks on-chip. IPDPS (2009)
Mahmoud Moadeli, Wim Vanderbauwhede
A Communication Model of Broadcast in Wormhole-Routed Networks on-Chip. AINA (2009)
Paul Edward McKechnie, Michaela Blott, Wim Vanderbauwhede
Architectural Comparison of Instruments for Transaction Level Monitoring of FPGA-Based Packet Processing Systems. FCCM (2009)
Paul Edward McKechnie, Michaela Blott, Wim Vanderbauwhede
Automated instrumentation of FPGA-based systems for system-level transaction monitoring. SoC (2009)
Mahmoud Moadeli, Ali Shahrabi, Wim Vanderbauwhede, Mohamed Ould-Khaoua
An Analytical Comparison of the Spidergon and Rectangular Mesh NoCs. J. Interconnect. Networks 10 (1-2) (2009)
Kunjan Patel, Jong Chern Lim, Chris J. Bleakley, Wim Vanderbauwhede
MAW: A Reliable Lightweight Multi-hop Wireless Sensor Network Routing Protocol. CSE (2) (2009)
Wim Vanderbauwhede, Leif Azzopardi, Mahmoud Moadeli
FPGA-accelerated Information Retrieval: High-efficiency document filtering. FPL (2009)
Paul Edward McKechnie, Michaela Blott, Wim Vanderbauwhede
Debugging FPGA-based packet processing systems through transaction-level communication-centric monitoring. LCTES (2009)
Mahmoud Moadeli, Partha P. Maji, Wim Vanderbauwhede
Design and implementation of the Quarc Network on-Chip. IPDPS (2009)
Sai Rahul Chalamalasetti, Wim Vanderbauwhede, Sohan Purohit, Martin Margala
A low cost reconfigurable soft processor for multimedia applications: Design synthesis and programming model. FPL (2009)
Faiz-ul Hassan, B. Cheng, Wim Vanderbauwhede, Fernando Rodríguez Salazar
Impact of device variability in the communication structures for future synchronous SoC designs. SoC (2009)
Wim Vanderbauwhede, Martin Margala, Sai Rahul Chalamalasetti, Sohan Purohit
Programming Model and Low-level Language for a Coarse-Grained Reconfigurable Multimedia Processor. ERSA (2009)
Leif Azzopardi, Wim Vanderbauwhede, Mahmoud Moadeli
Developing energy efficient filtering systems. SIGIR (2009)
Syed Waqar Nabi, Cade C. Wells, Wim Vanderbauwhede
Interface and Reconfiguration Controller for a wireless MAC-oriented dynamically reconfigurable hardware co-processor. FPL (2008)
Mahmoud Moadeli, Alireza Shahrabi, Wim Vanderbauwhede, Mohamed Ould-Khaoua
Modeling Differentiated Services-Based QoS in Wormhole-Routed NoCs. AINA (2008)
Wim Vanderbauwhede
A Formal Semantics for Control and Data flow in the Gannet Service-based System-on-Chip Architecture. ERSA (2008)
Syed Waqar Nabi, Cade C. Wells, Wim Vanderbauwhede
A coarse-grained Dynamically Reconfigurable MAC Processor for power-sensitive multi-standard devices. SoCC (2008)
Wim Vanderbauwhede, Paul Edward McKechnie, Chidambaram Thirunavukkarasu
The Gannet Service Manager: A Distributed Dataflow Controller for Heterogeneous Multi-core SoCs. AHS (2008)

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Publication Activity (10 Years)

Top Topics

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Wim Vanderbauwhede