Smart-Cache: Optimising Memory Accesses for Arbitrary Boundaries and Stencils on FPGAs.
Syed Waqar NabiWim VanderbauwhedePublished in: IPDPS Workshops (2019)
Keyphrases
- memory access
- memory hierarchy
- main memory
- data access
- memory management
- cache conscious
- access patterns
- external memory
- memory subsystem
- cache misses
- access latency
- computing power
- shared memory
- processing units
- hardware implementation
- garbage collection
- memory space
- virtual memory
- operating system
- resource consumption
- binary trees
- disk accesses
- secondary storage
- multithreading
- memory requirements
- memory efficient
- data management
- smart camera
- query processing
- flash memory
- associative memory
- parallel algorithm