Valentin Puente

Publication Activity (10 Years)

Years Active: 1999-2023
Publications (10 Years): 16

Top Topics

Cerebral Cortex

Messages Exchanged

Memory Hierarchy

Top Venues

IEEE Trans. Parallel Distributed Syst.

J. Parallel Distributed Comput.

Publications

Pablo Prieto, Pablo Abad Fidalgo, José-Ángel Gregorio, Valentin Puente
Performance Characterization of Popular DNN Models on Out-of-Order CPUs. PACT (2023)
Alvaro Saiz, Pablo Prieto, Pablo Abad Fidalgo, José-Ángel Gregorio, Valentin Puente
Top-Down Performance Profiling on NVIDIA's GPUs. IPDPS (2022)
Pablo Prieto, Pablo Abad Fidalgo, José-Ángel Gregorio, Valentin Puente
Fast, Accurate Processor Evaluation Through Heterogeneous, Sample-Based Benchmarking. IEEE Trans. Parallel Distributed Syst. 32 (12) (2021)
Lucia G. Menezo, Valentin Puente, José-Ángel Gregorio
Rainbow: A Composable Coherence Protocol for Multi-Chip Servers. CoRR (2020)
Lucia G. Menezo, Valentin Puente, José-Ángel Gregorio
Rainbow: A composable coherence protocol for multi-chip servers. Concurr. Comput. Pract. Exp. 32 (24) (2020)
Pablo Prieto, Pablo Abad Fidalgo, Jose Angel Herrero, José-Ángel Gregorio, Valentin Puente
SPECcast: A Methodology for Fast Performance Evaluation with SPEC CPU 2017 Multiprogrammed Workloads. ICPP (2020)
Adrian Colaso, Pablo Prieto, Jose Angel Herrero, Pablo Abad Fidalgo, Valentin Puente, José-Ángel Gregorio
Accuracy vs. Computational Cost Tradeoff in Distributed Computer System Simulation. CoRR (2019)
Valentin Puente, José-Ángel Gregorio
CLASSIC: A cortex-inspired hardware accelerator. J. Parallel Distributed Comput. 134 (2019)
Adrian Colaso, Pablo Prieto, Pablo Abad Fidalgo, José-Ángel Gregorio, Valentin Puente
Architecting Racetrack Memory Preshift through Pattern-Based Prediction Mechanisms. IPDPS (2019)
Lucia G. Menezo, Valentin Puente, Pablo Abad Fidalgo, José-Ángel Gregorio
Mosaic: A Scalable Coherence Protocol. Int. J. Parallel Program. 46 (6) (2018)
Adrian Colaso, Pablo Prieto, Jose Angel Herrero, Pablo Abad Fidalgo, Lucia G. Menezo, Valentin Puente, José-Ángel Gregorio
Memory Hierarchy Characterization of NoSQL Applications through Full-System Simulation. IEEE Trans. Parallel Distributed Syst. 29 (5) (2018)
Lucia G. Menezo, Valentin Puente, José-Ángel Gregorio
An adaptive cache coherence protocol: Trading storage for traffic. J. Parallel Distributed Comput. 102 (2017)
Pablo Abad Fidalgo, Pablo Prieto, Valentin Puente, José-Ángel Gregorio
AC-WAR: Architecting the Cache Hierarchy to Improve the Lifetime of a Non-Volatile Endurance-Limited Main Memory. IEEE Trans. Parallel Distributed Syst. 27 (1) (2016)
Valentin Puente, José-Ángel Gregorio
CLAASIC: a Cortex-Inspired Hardware Accelerator. CoRR (2016)
Pablo Abad Fidalgo, Pablo Prieto, Valentin Puente, José-Ángel Gregorio
Improving last level shared cache performance through mobile insertion policies (MIP). Parallel Comput. 49 (2015)
Lucia G. Menezo, Valentin Puente, José-Ángel Gregorio
Flask coherence: A morphable hybrid coherence protocol to balance energy, performance and scalability. HPCA (2015)
Philip G. Emma, Alper Buyuktosunoglu, Michael B. Healy, Krishnan Kailas, Valentin Puente, Roy Yu, Allan Hartstein, Pradip Bose, Jaime H. Moreno, Eren Kursun
3D stacking of high-performance processors. HPCA (2014)
Pablo Abad Fidalgo, Pablo Prieto, Lucia G. Menezo, Adrian Colaso, Valentin Puente, José-Ángel Gregorio
Interaction of NoC Design and Coherence Protocol in 3D-Stacked CMPs. DSD (2013)
Pablo Prieto, Valentin Puente, José-Ángel Gregorio
CMP off-chip bandwidth scheduling guided by instruction criticality. ICS (2013)
Lucia G. Menezo, Valentin Puente, José-Ángel Gregorio
The case for a scalable coherence protocol for complex on-chip cache hierarchies in many-core systems. PACT (2013)
Pablo Abad Fidalgo, Valentin Puente, José-Ángel Gregorio
LIGERO: A light but efficient router conceived for cache-coherent chip multiprocessors. ACM Trans. Archit. Code Optim. 9 (4) (2013)
Lucia G. Menezo, Valentin Puente, Pablo Abad Fidalgo, José-Ángel Gregorio
Improving coherence protocol reactiveness by trading bandwidth for latency. Conf. Computing Frontiers (2012)
Pablo Abad Fidalgo, Valentin Puente, Lucia G. Menezo, José-Ángel Gregorio
Adaptive-Tree Multicast: Efficient Multidestination Support for CMP Communication Substrate. IEEE Trans. Parallel Distributed Syst. 23 (11) (2012)
Lucia G. Menezo, Valentin Puente, José-Ángel Gregorio
LOCKE Detailed Specification Tables CoRR (2012)
Pablo Abad Fidalgo, Valentin Puente, José-Ángel Gregorio
Balancing Performance and Cost in CMP Interconnection Networks. IEEE Trans. Parallel Distributed Syst. 23 (3) (2012)
Javier Merino, Valentin Puente, José-Ángel Gregorio
The Necessity for Hardware QoS Support for Server Consolidation and Cloud Computing CoRR (2012)
Pablo Abad Fidalgo, Pablo Prieto, Valentin Puente, José-Ángel Gregorio
BIXBAR: A low cost solution to support dynamic link reconfiguration in networks on chip. ICCD (2012)
Pablo Abad Fidalgo, Pablo Prieto, Lucia G. Menezo, Adrian Colaso, Valentin Puente, José-Ángel Gregorio
TOPAZ: An Open-Source Interconnection Network Simulator for Chip Multiprocessors and Supercomputers. NOCS (2012)
Pablo Prieto, Valentin Puente, José-Ángel Gregorio
Multilevel Cache Modeling for Chip-Multiprocessor Systems. IEEE Comput. Archit. Lett. 10 (2) (2011)
Javier Merino, Valentin Puente, José-Ángel Gregorio
ESP-NUCA: A low-cost adaptive Non-Uniform Cache Architecture. HPCA (2010)
Pablo Abad Fidalgo, Valentin Puente, José-Ángel Gregorio
MRR: Enabling fully adaptive multicast routing for CMP interconnection networks. HPCA (2009)
Valentin Puente, José-Ángel Gregorio, Fernando Vallejo, Ramón Beivide
Immunet: Dependable Routing for Interconnection Networks with Arbitrary Topology. IEEE Trans. Computers 57 (12) (2008)
Pablo Abad Fidalgo, Valentin Puente, José-Ángel Gregorio
Reducing the Interconnection Network Cost of Chip Multiprocessors. NOCS (2008)
Javier Merino, Valentin Puente, Pablo Prieto, José-Ángel Gregorio
SP-NUCA: a cost effective dynamic non-uniform cache architecture. SIGARCH Comput. Archit. News 36 (2) (2008)
Pablo Abad Fidalgo, Valentin Puente, José-Ángel Gregorio, Pablo Prieto
Rotary router: an efficient architecture for CMP interconnection networks. ISCA (2007)
Valentin Puente, José-Ángel Gregorio
Immucube: Scalable Fault-Tolerant Routing for k-ary n-cube Networks. IEEE Trans. Parallel Distributed Syst. 18 (6) (2007)
Valentin Puente, José A. Gregorio, Fernando Vallejo, Ramón Beivide, Cruz Izu
High-performance adaptive routing for networks with arbitrary topology. J. Syst. Archit. 52 (6) (2006)
Marco Galluzzi, Valentin Puente, Adrián Cristal, Ramón Beivide, José-Ángel Gregorio, Mateo Valero
A first glance at Kilo-instruction based multiprocessors. Conf. Computing Frontiers (2004)
Valentin Puente, José A. Gregorio, Fernando Vallejo, Ramón Beivide
Immunet: A Cheap and Robust Fault-Tolerant Packet Routing Mechanism. ISCA (2004)
Luis A. Amigo, Valentin Puente, José-Ángel Gregorio
Simulation Methodology for Decision Support Workloads. PDP (2004)
José Miguel-Alonso, José A. Gregorio, Valentin Puente, Fernando Vallejo, Ramón Beivide
Load Unbalance in k-ary n-Cube Networks. Euro-Par (2004)
Marco Galluzzi, Ramón Beivide, Valentin Puente, José-Ángel Gregorio, Adrián Cristal, Mateo Valero
Evaluating kilo-instruction multiprocessors. WMPI (2004)
Valentin Puente, José A. Gregorio, Ramón Beivide, Fernando Vallejo
A Low Cost Fault Tolerant Packet Routing for Parallel Computers. IPDPS (2003)
Valentin Puente, José A. Gregorio, Ramón Beivide, Cruz Izu
On the Design of a High-Performance Adaptive Router for CC-NUMA Multiprocessors. IEEE Trans. Parallel Distributed Syst. 14 (5) (2003)
Valentin Puente, José A. Gregorio, Ramón Beivide
SICOSYS: An Integrated Framework for studying Interconnection Network Performance in Multiprocessor Systems. PDP (2002)
Valentin Puente, Cruz Izu, Ramón Beivide, José A. Gregorio, Fernando Vallejo, J. M. Prellezo
The Adaptive Bubble Router. J. Parallel Distributed Comput. 61 (9) (2001)
Valentin Puente, José A. Gregorio, Ramón Beivide, Fernando Vallejo, Andres Ibañez
A new routing mechanism for networks with irregular topology. SC (2001)
Andres Ibañez, Valentin Puente, José A. Gregorio, Ramón Beivide
A New Communication Mechanism for Cluster Computing. Euro-Par (2001)
Valentin Puente, Cruz Izu, José A. Gregorio, Ramón Beivide, J. M. Prellezo, Fernando Vallejo
Improving parallel system performance by changing the arrangement of the network links. ICS (2000)
Valentin Puente, J. M. Prellezo, Cruz Izu, José-Ángel Gregorio, Ramón Beivide
A case study of trace-driven simulation for analyzing interconnection networks: cc-NUMAs with ILP processors. PDP (2000)
Valentin Puente, José A. Gregorio, Cruz Izu, Ramón Beivide
Impact of the Head-of-Line Blocking on Parallel Computer Networks: Hardware to Applications. Euro-Par (1999)
Valentin Puente, José A. Gregorio, Cruz Izu, Ramón Beivide, Fernando Vallejo
Low-level router design and its impact on supercomputer system performance. International Conference on Supercomputing (1999)
Valentin Puente, Ramón Beivide, José A. Gregorio, J. M. Prellezo, José Duato, Cruz Izu
Adaptive Bubble Router: A Design to Improve Performance in Torus Networks. ICPP (1999)