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WMPI
2004
2004
2004
Keyphrases
Publications
2004
Proceedings of the 3rd Workshop on Memory Performance Issues, in conjunction with the 31st International Symposium on Computer Architecture 2004, Munich, Germany, June 20, 2004
WMPI
(2004)
Chikafumi Takahashi
,
Masaaki Kondo
,
Taisuke Boku
,
Daisuke Takahashi
,
Hiroshi Nakamura
,
Mitsuhisa Sato
SCIMA-SMP: on-chip memory processor architecture for SMP.
WMPI
(2004)
Lars Wehmeyer
,
Urs Helmig
,
Peter Marwedel
Compiler-optimized usage of partitioned memories.
WMPI
(2004)
Erik G. Hallnor
,
Steven K. Reinhardt
A compressed memory hierarchy using an indirect index cache.
WMPI
(2004)
Chitra Natarajan
,
Bruce Christenson
,
Faye A. Briggs
A study of performance impact of memory controller features in multi-processor server environment.
WMPI
(2004)
José González
,
Fernando Latorre
,
Antonio González
Cache organizations for clustered microarchitectures.
WMPI
(2004)
Magnus Ekman
,
Per Stenström
A case for multi-level main memory.
WMPI
(2004)
Stephen Somogyi
,
Thomas F. Wenisch
,
Nikolaos Hardavellas
,
Jangwoo Kim
,
Anastassia Ailamaki
,
Babak Falsafi
Memory coherence activity prediction in commercial workloads.
WMPI
(2004)
Doron Nakar
,
Shlomo Weiss
Selective main memory compression by identifying program phase changes.
WMPI
(2004)
Marco Galluzzi
,
Ramón Beivide
,
Valentin Puente
,
José-Ángel Gregorio
,
Adrián Cristal
,
Mateo Valero
Evaluating kilo-instruction multiprocessors.
WMPI
(2004)
Irina Chihaia
,
Thomas R. Gross
An analytical model for software-only main memory compression.
WMPI
(2004)
G. Surendra
,
Subhasis Banerjee
,
S. K. Nandy
On the effectiveness of prefetching and reuse in reducing L1 data cache traffic: a case study of Snort.
WMPI
(2004)
Steven T. Gabriel
,
David S. Wise
The Opie compiler from row-major source to Morton-ordered matrices.
WMPI
(2004)
Onur Mutlu
,
Hyesoon Kim
,
David N. Armstrong
,
Yale N. Patt
Understanding the effects of wrong-path memory references on processor performance.
WMPI
(2004)
Wolfgang Raab
,
Hans-Martin Blüthgen
,
Ulrich Ramacher
A low-power memory hierarchy for a fully programmable baseband processor.
WMPI
(2004)
Ramesh V. Peri
,
John Fernando
,
Ravi K. Kolagotla
Addressing mode driven low power data caches for embedded processors.
WMPI
(2004)
Jay B. Brockman
,
Shyamkumar Thoziyoor
,
Shannon K. Kuntz
,
Peter M. Kogge
A low cost, multithreaded processing-in-memory system.
WMPI
(2004)
Muhamed F. Mudawar
Scalable cache memory design for large-scale SMT architectures.
WMPI
(2004)
Collin McCurdy
,
Charles N. Fischer
A localizing directory coherence protocol.
WMPI
(2004)
Faye A. Briggs
,
Suresh Chittor
,
Kai Cheng
Micro-architecture techniques in the intel E8870 scalable memory controller.
WMPI
(2004)