Login / Signup
LIGERO: A light but efficient router conceived for cache-coherent chip multiprocessors.
Pablo Abad Fidalgo
Valentin Puente
José-Ángel Gregorio
Published in:
ACM Trans. Archit. Code Optim. (2013)
Keyphrases
</>
high speed
multithreading
low cost
data management
input output
end to end
data access
shared memory
high density
analog vlsi