Ting-Ting Y. Lin

Publication Activity (10 Years)

Years Active: 1991-1997
Publications (10 Years): 0

Publications

Zhiyu Tian, Ting-Ting Y. Lin, Shiyuan Yang, Shibai Tong
The Faulty Behavior of Feedforward Neural Networks with Hard-limiting Activation Fuction. Neural Comput. 9 (5) (1997)
John Lillis, Chung-Kuan Cheng, Ting-Ting Y. Lin
Optimal wire sizing and buffer insertion for low power and a generalized delay model. IEEE J. Solid State Circuits 31 (3) (1996)
John Lillis, Chung-Kuan Cheng, Ting-Ting Y. Lin, Chin-Yen Ho
New Performance Driven Routing Techniques With Explicit Area/Delay Tradeoff and Simultaneous Wire Sizing. DAC (1996)
John Lillis, Chung-Kuan Cheng, Ting-Ting Y. Lin
Simultaneous Routing and Buffer Insertion for High Performance Interconnect. Great Lakes Symposium on VLSI (1996)
Huoy-Yu Liou, Ting-Ting Y. Lin, Chung-Kuan Cheng
Area Efficient Pipelined Pseudo-Exhaustive Testing with Retiming. DAC (1996)
Ching-Wei Yeh, Chung-Kuan Cheng, Ting-Ting Y. Lin
Circuit clustering using a stochastic flow injection method. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14 (2) (1995)
John Lillis, Chung-Kuan Cheng, Ting-Ting Y. Lin
Optimal wire sizing and buffer insertion for low power and a generalized delay model. ICCAD (1995)
Chia-Chun Tsai, De-Yu Kao, Chung-Kuan Cheng, Ting-Ting Y. Lin
Performance driven multiple-source bus synthesis using buffer insertion. ASP-DAC (1995)
Jae W. Chung, De-Yu Kao, Chung-Kuan Cheng, Ting-Ting Y. Lin
Optimization of power dissipation and skew sensitivity in clock buffer synthesis. ISLPD (1995)
Ching-Wei Yeh, Chung-Kuan Cheng, Ting-Ting Y. Lin
Optimization by iterative improvement: an experimental evaluation on two-way partitioning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14 (2) (1995)
Ching-Wei Yeh, Chung-Kuan Cheng, Ting-Ting Y. Lin
A general purpose, multiple-way partitioning algorithm. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13 (12) (1994)
Amiya Bhattacharya, Ramesh R. Rao, Ting-Ting Y. Lin
Performability analysis of non-repairable multicomponent systems using order statistics. SPDP (1994)
Ting-Ting Y. Lin, Huoy-Yu Liou
A New Framework for Designing: Built-in Test Multichip Modules with Pipelined Test Strategy. IEEE Des. Test Comput. 10 (4) (1993)
Amiya Bhattacharya, Ramesh R. Rao, Ting-Ting Y. Lin
Delay Analysis in Synchronous Circuit-Switched Delta Networks. IPPS (1993)
Ching-Wei Yeh, Chung-Kuan Cheng, Ting-Ting Y. Lin
A probabilistic multicommodity-flow solution to circuit clustering problems. ICCAD (1992)
Ching-Wei Yeh, Chung-Kuan Cheng, Ting-Ting Y. Lin
A General Purpose Multiple Way Partitioning Algorithm. DAC (1991)