Subramanian Rajagopalan

Publication Activity (10 Years)

Years Active: 2000-2015
Publications (10 Years): 1

Top Topics

Engineering Design

Top Venues

Publications

Nitin Salodkar, Subramanian Rajagopalan, Sambuddha Bhattacharya, Shabbir H. Batterywala
2SAT Based Infeasibility Resolution during Design Rule Correction on Layouts with Multiple Grids. VLSI Design (2015)
Sambuddha Bhattacharya, Subramanian Rajagopalan, Shabbir H. Batterywala
Fixing Double Patterning violations with look-ahead. ASP-DAC (2014)
Nitin Salodkar, Subramanian Rajagopalan, Sambuddha Bhattacharya, Shabbir H. Batterywala
Automatic design rule correction in presence of multiple grids and track patterns. DAC (2013)
Subramanian Rajagopalan, Sambuddha Bhattacharya, Shabbir H. Batterywala
Efficient Analog/RF Layout Closure with Compaction Based Legalization. VLSI Design (2009)
Shabbir H. Batterywala, Sambuddha Bhattacharya, Subramanian Rajagopalan, Hi-Keung Tony Ma, Narendra V. Shenoy
Cell Swapping Based Migration Methodology for Analog and Custom Layouts. ISQED (2008)
Sambuddha Bhattacharya, Shabbir H. Batterywala, Subramanian Rajagopalan, Hi-Keung Tony Ma, Narendra V. Shenoy
On Efficient and Robust Constraint Generation for Practical Layout Legalization. ISQED (2008)
Subramanian Rajagopalan, Shabbir H. Batterywala
A 3-dimensional FEM Based Resistance Extraction. VLSI Design (2007)
Debjit Sinha, Jianfeng Luo, Subramanian Rajagopalan, Shabbir H. Batterywala, Narendra V. Shenoy, Hai Zhou
Impact of Modern Process Technologies on the Electrical Parameters of Interconnects. VLSI Design (2007)
Wei Qin, Subramanian Rajagopalan, Sharad Malik
A formal concurrency model based architecture description language for synthesis of software development tools. LCTES (2004)
Wei Qin, Subramanian Rajagopalan, Manish Vachharajani, Hangsheng Wang, Xinping Zhu, David I. August, Kurt Keutzer, Sharad Malik, Li-Shiuan Peh
Design Tools for Application Specific Embedded Processors. EMSOFT (2002)
Guilherme Ottoni, Sandro Rigo, Guido Araujo, Subramanian Rajagopalan, Sharad Malik
Optimal Live Range Merge for Address Register Allocation in Embedded Programs. CC (2001)
Subramanian Rajagopalan, Sreeranga P. Rajan, Sharad Malik, Sandro Rigo, Guido Araujo, Koichiro Takayama
A retargetable VLIW compiler framework for DSPs withinstruction-level parallelism. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20 (11) (2001)
Subramanian Rajagopalan, Manish Vachharajani, Sharad Malik
Handling irregular ILP within conventional VLIW schedulers using artificial resource constraints. CASES (2000)