Stephen Kosonocky

Publication Activity (10 Years)

Years Active: 1998-2023
Publications (10 Years): 9

Top Topics

Power Management

Silicon On Insulator

Top Venues

IEEE J. Solid State Circuits

Publications

Srikant Bharadwaj, Shomit Das, Kaushik Mazumdar, Bradford M. Beckmann, Stephen Kosonocky
Predict; Don't React for Enabling Efficient Fine-Grain DVFS in GPUs. ASPLOS (4) (2023)
Srikant Bharadwaj, Shomit Das, Kaushik Mazumdar, Bradford M. Beckmann, Stephen Kosonocky
Predict; Do not React for Enabling Efficient Fine Grain DVFS in GPUs. CoRR (2022)
Mark Papermaster, Stephen Kosonocky, Gabriel H. Loh, Samuel Naffziger
A New Era of Tailored Computing. VLSI Circuits (2021)
Teja Singh, Alex Schaefer, Sundar Rangarajan, Deepesh John, Carson Henrion, Russell Schreiber, Miguel Rodriguez, Stephen Kosonocky, Samuel Naffziger, Amy Novak
Zen: An Energy-Efficient High-Performance × 86 Core. IEEE J. Solid State Circuits 53 (1) (2018)
Teja Singh, Sundar Rangarajan, Deepesh John, Carson Henrion, Shane Southard, Hugh McIntyre, Amy Novak, Stephen Kosonocky, Ravi Jotwani, Alex Schaefer, Edward Chang, Joshua Bell, Michael Co
3.2 Zen: A next-generation high-performance ×86 core. ISSCC (2017)
Sriram Sundaram, Aaron Grenat, Samuel Naffziger, Tom Burd, Stephen Kosonocky, Steven Liepe, Ravinder Rachala, Miguel Rodriguez, Michael Austin, Sriram Sambamurthy
Bristol Ridge: A 28-nm × 86 Performance-Enhanced Microprocessor Through System Power Management. IEEE J. Solid State Circuits 52 (1) (2017)
Aaron Grenat, Sriram Sundaram, Stephen Kosonocky, Ravinder Rachala, Sriram Sambamurthy, Steven Liepe, Miguel Rodriguez, Tom Burd, Adam Clark, Michael Austin, Samuel Naffziger
4.2 Increasing the performance of a 28nm x86-64 microprocessor through system power management. ISSCC (2016)
Ravinder Rachala, Miguel Rodriguez, Stephen Kosonocky, Milos Trajkovic
Modeling and implementation of a fully-digital integrated per-core voltage regulation system in a 28nm high performance 64-bit processor. ISLPED (2016)
Sriram Sundaram, Sriram Sambamurthy, Michael Austin, Aaron Grenat, Michael Golden, Stephen Kosonocky, Samuel Naffziger
Adaptive Voltage Frequency Scaling Using Critical Path Accumulator Implemented in 28nm CPU. VLSI Design (2016)
Kathryn Wilcox, Robert Cole, Harry R. Fair III, Kevin Gillespie, Aaron Grenat, Carson Henrion, Ravi Jotwani, Stephen Kosonocky, Benjamin Munger, Samuel Naffziger, Robert S. Orefice, Sanjay Pant, Donald A. Priore, Ravinder Rachala, Jonathan White
Steamroller Module and Adaptive Clocking System in 28 nm CMOS. IEEE J. Solid State Circuits 50 (1) (2015)
Vivek De, Stephen Kosonocky, Jonathan Chang, Yogesh K. Ramadass, David Stoppa
Highlights of the IEEE ISSCC 2014 Processors, Digital, Memory, Biomedical & Next-Generation Systems Technologies, and Imagers, MEMS, Medical & Displays Sessions. IEEE J. Solid State Circuits 50 (1) (2015)
Stephen Kosonocky, Vladimir Stojanovic, Kees van Berkel, Ming-Yang Chao, Tobias Knoll, Joshua Friedrich
Power/performance optimization of many-core processor SoCs. ISSCC (2012)
Kyle Craig, Yousef Shakhsheer, Sudhanshu Khanna, Saad Arrabi, John C. Lach, Benton H. Calhoun, Stephen Kosonocky
A programmable resistive power grid for post-fabrication flexibility and energy tradeoffs. ISLPED (2012)
Ravi Jotwani, Sriram Sundaram, Stephen Kosonocky, Alex Schaefer, Victor Andrade, Amy Novak, Sam Naffziger
An x86-64 Core in 32 nm SOI CMOS. IEEE J. Solid State Circuits 46 (1) (2011)
Stephen Kosonocky
Practical power gating and dynamic voltage/frequency scaling. Hot Chips Symposium (2011)
Ravi Jotwani, Sriram Sundaram, Stephen Kosonocky, Alex Schaefer, Victor Andrade, Greg Constant, Amy Novak, Sam Naffziger
An x86-64 core implemented in 32nm SOI CMOS. ISSCC (2010)
Azeez J. Bhavnagarwala, Stephen Kosonocky, Carl Radens, Yuen H. Chan, Kevin Stawiasz, Uma Srinivasan, Steven P. Kowalczyk, Matthew M. Ziegler
A Sub-600-mV, Fluctuation Tolerant 65-nm CMOS SRAM Array With Dynamic Cell Biasing. IEEE J. Solid State Circuits 43 (4) (2008)
Kemal Ebcioglu, Jason Fritts, Stephen Kosonocky, Michael Gschwind, Erik R. Altman, Krishnan Kailas, Terry Bright
An eight-issue tree-VLIW processor for dynamic binary translation. ICCD (1998)