Srinath R. Naidu

Publication Activity (10 Years)

Years Active: 2001-2018
Publications (10 Years): 3

Top Topics

Lagrange Multipliers

Log Gabor Filters

Evolutionary Search

Top Venues

ACM Great Lakes Symposium on VLSI

Publications

Pinkey Kumari, Srinath R. Naidu
Fast Approach for Iris Detection on GPU by Applying Search Localization for Circular Hough Transform. ICACCI (2018)
Sita Kondamadugula, Srinath R. Naidu
Parameter-importance based Monte-Carlo Technique for Variation-aware Analog Yield Optimization. ACM Great Lakes Symposium on VLSI (2016)
Sita Kondamadugula, Srinath R. Naidu
Accelerated evolutionary algorithms with parameterimportance based population initialization for variation-aware analog yield optimization. MWSCAS (2016)
Srinath R. Naidu
Geometric Programming Formulation for Gate Sizing with Pipelining Constraints. VLSI Design (2015)
Srinath R. Naidu
Speeding up Monte-Carlo Simulation for Statistical Timing Analysis of Digital Integrated Circuits. VLSI Design (2007)
Jochen A. G. Jess, Kerim Kalafala, Srinath R. Naidu, Ralph H. J. M. Otten, Chandramouli Visweswariah
Statistical Timing for Parametric Yield Prediction of Digital Integrated Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25 (11) (2006)
Srinath R. Naidu, Vijay Chandru
On Synthesis of Easily Testable (k, K) Circuits. IEEE Trans. Computers 52 (11) (2003)
Jochen A. G. Jess, Kerim Kalafala, Srinath R. Naidu, Ralph H. J. M. Otten, Chandramouli Visweswariah
Statistical timing for parametric yield prediction of digital integrated circuits. DAC (2003)
Srinath R. Naidu
Timing Yield Calculation Using an Impulse-Train Approach. VLSI Design (2002)
Srinath R. Naidu, E. T. A. F. Jacobs
Minimizing stand-by leakage power in static CMOS circuits. DATE (2001)