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Seung-Yeob Baek
Publication Activity (10 Years)
Years Active: 2013-2021
Publications (10 Years): 3
Top Topics
Noise Shaping
Analog To Digital Converter
Ultra Low Power
Synthetic Aperture Radar Images
Top Venues
ISSCC
IEEE Trans. Circuits Syst. II Express Briefs
IEEE J. Solid State Circuits
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Publications
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Seung-Yeob Baek
,
Il-Hoon Jang
,
Michael Choi
,
Hyungdong Roh
,
Woongtaek Lim
,
Youngjae Cho
,
Jongshin Shin
A 12b 600MS/s Pipelined SAR and 2x-Interleaved Incremental Delta-Sigma ADC with Source-Follower-Based Residue-Transfer Scheme in 7nm FinFET.
ISSCC
(2021)
Byoung-Joo Yoo
,
Dong-Hyuk Lim
,
Hyonguk Pang
,
June-Hee Lee
,
Seung-Yeob Baek
,
Naxin Kim
,
Dong-Ho Choi
,
Young-Ho Choi
,
Hyeyeon Yang
,
Taehun Yoon
,
Sang-Hyeok Chu
,
Kangjik Kim
,
Woochul Jung
,
Bong-Kyu Kim
,
Jaechol Lee
,
Gunil Kang
,
Sang-Hune Park
,
Michael Choi
,
Jongshin Shin
6.4 A 56Gb/s 7.7mW/Gb/s PAM-4 Wireline Transceiver in 10nm FinFET Using MM-CDR-Based ADC Timing Skew Control and Low-Power DSP with Approximate Multiplier.
ISSCC
(2020)
Il-Hoon Jang
,
Min-Jae Seo
,
Sang-Hyun Cho
,
Jae-Keun Lee
,
Seung-Yeob Baek
,
Sunwoo Kwon
,
Michael Choi
,
Hyung-Jong Ko
,
Seung-Tak Ryu
A 4.2-mW 10-MHz BW 74.4-dB SNDR Continuous-Time Delta-Sigma Modulator With SAR-Assisted Digital-Domain Noise Coupling.
IEEE J. Solid State Circuits
53 (4) (2018)
Seung-Yeob Baek
,
Jae-Kyum Lee
,
Seung-Tak Ryu
An 88-dB Max-SFDR 12-bit SAR ADC With Speed-Enhanced ADEC and Dual Registers.
IEEE Trans. Circuits Syst. II Express Briefs
(9) (2013)